Patents by Inventor John S. Drewery
John S. Drewery has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9607848Abstract: A method for etching features with different aspect ratios in an etch layer is provided. A plurality of cycles is provided wherein each cycle comprises a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient condition has a duration and etching the etch layer for a duration, wherein the duration of the etching with respect to the duration of the transient condition is controlled to control etch aspect ratio dependence.Type: GrantFiled: February 4, 2016Date of Patent: March 28, 2017Assignee: Lam Research CorporationInventors: Wonchul Lee, Qian Fu, John S. Drewery
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Publication number: 20160155645Abstract: A method for etching features with different aspect ratios in an etch layer is provided. A plurality of cycles is provided wherein each cycle comprises a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient condition has a duration and etching the etch layer for a duration, wherein the duration of the etching with respect to the duration of the transient condition is controlled to control etch aspect ratio dependence.Type: ApplicationFiled: February 4, 2016Publication date: June 2, 2016Inventors: Wonchul LEE, Qian FU, John S. DREWERY
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Patent number: 9257296Abstract: A method for etching features with different aspect ratios in an etch layer is provided. A plurality of cycles is provided wherein each cycle comprises a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient condition has a duration and etching the etch layer for a duration, wherein the duration of the etching with respect to the duration of the transient condition is controlled to control etch aspect ratio dependence.Type: GrantFiled: September 3, 2015Date of Patent: February 9, 2016Assignee: Lam Research CorporationInventors: Wonchul Lee, Qian Fu, John S. Drewery
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Publication number: 20150380264Abstract: A method for etching features with different aspect ratios in an etch layer is provided. A plurality of cycles is provided wherein each cycle comprises a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient condition has a duration and etching the etch layer for a duration, wherein the duration of the etching with respect to the duration of the transient condition is controlled to control etch aspect ratio dependence.Type: ApplicationFiled: September 3, 2015Publication date: December 31, 2015Inventors: Wonchul LEE, Qian FU, John S. DREWERY
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Patent number: 9142417Abstract: A method for etching features with different aspect ratios in an etch layer is provided. A plurality of cycles is provided wherein each cycle comprises a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient condition has a duration and etching the etch layer for a duration, wherein the duration of the etching with respect to the duration of the transient condition is controlled to control etch aspect ratio dependence.Type: GrantFiled: December 14, 2012Date of Patent: September 22, 2015Assignee: Lam Research CorporationInventors: Wonchul Lee, Qian Fu, John S. Drewery
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Patent number: 8795482Abstract: Methods and apparatus are provided for planar metal plating on a workpiece having a surface with recessed regions and exposed surface regions; comprising the steps of: causing a plating accelerator to become attached to said surface including the recessed and exposed surface regions; selectively removing the plating accelerator from the exposed surface regions without performing substantial metal plating on the surface; and after removal of plating accelerator is at least partially complete, plating metal onto the surface, whereby the plating accelerator remaining attached to the surface increases the rate of metal plating in the recessed regions relative to the rate of metal plating in the exposed surface regions.Type: GrantFiled: August 10, 2012Date of Patent: August 5, 2014Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, Marshall R. Stowell, John S. Drewery, Richard S. Hill, Timothy M. Archer, Avishai Kepten
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Publication number: 20140167228Abstract: A method for etching features with different aspect ratios in an etch layer is provided. A plurality of cycles is provided wherein each cycle comprises a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient condition has a duration and etching the etch layer for a duration, wherein the duration of the etching with respect to the duration of the transient condition is controlled to control etch aspect ratio dependence.Type: ApplicationFiled: December 14, 2012Publication date: June 19, 2014Applicant: LAM RESEARCH CORPORATIONInventors: Wonchul LEE, Qian FU, John S. DREWERY
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Patent number: 8268154Abstract: Methods and apparatus are provided for planar metal plating on a workpiece having a surface with recessed regions and exposed surface regions; comprising the steps of: causing a plating accelerator to become attached to said surface including the recessed and exposed surface regions; selectively removing the plating accelerator from the exposed surface regions without performing substantial metal plating on the surface; and after removal of plating accelerator is at least partially complete, plating metal onto the surface, whereby the plating accelerator remaining attached to the surface increases the rate of metal plating in the recessed regions relative to the rate of metal plating in the exposed surface regions.Type: GrantFiled: August 20, 2010Date of Patent: September 18, 2012Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, John S. Drewery, Richard S. Hill, Timothy M. Archer, Avishai Kepten
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Patent number: 7682498Abstract: A work piece is electroplated or electroplanarized using an azimuthally asymmetric electrode. The azimuthally asymmetric electrode is rotated with respect to the work piece (i.e., either or both of the work piece and the electrode may be rotating). The azimuthal asymmetry provides a time-of-exposure correction to the current distribution reaching the work piece. In some embodiments, the total current is distributed among a plurality of electrodes in a reaction cell in order to tailor the current distribution in the electrolyte over time. Focusing elements may be used to create “virtual electrode” in proximity to the surface of the work piece to further control the current distribution in the electrolyte during plating or planarization.Type: GrantFiled: July 11, 2005Date of Patent: March 23, 2010Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, John S. Drewery
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Patent number: 7531079Abstract: The present invention pertains to apparatus and methods for planarization of metal surfaces having both recessed and raised features, over a large range of feature sizes. The invention accomplishes this by increasing the fluid agitation in raised regions with respect to recessed regions. That is, the agitation of the electropolishing bath fluid is agitated or exchanged as a function of elevation on the metal film profile. The higher the elevation, the greater the movement or exchange rate of bath fluid. In preferred methods of the invention, this agitation is achieved through the use of a microporous electropolishing pad that moves over (either near or in contact with) the surface of the wafer during the electropolishing process. Thus, methods of the invention are electropolishing methods, which in some cases include mechanical polishing elements.Type: GrantFiled: February 23, 2005Date of Patent: May 12, 2009Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, John S. Drewery
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Patent number: 7449098Abstract: A disclosed form of mechanically assisted electroplating leads to a flat, thin, overburden. In one example, an accelerator is deposited on a copper surface and mechanically removed in a simplified CMP-like apparatus. The wafer is then plated in an electrolyte containing little or no accelerating additives.Type: GrantFiled: December 17, 2003Date of Patent: November 11, 2008Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, Jonathan D. Reid, Mark L. Rea, Ismail T. Emesh, Henner W. Meinhold, John S. Drewery
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Patent number: 6790773Abstract: A process and structure are provided that allows electroplating to fill sub-micron, high aspect ratio features using a non-conformal conductive layer between the dielectric layer and the platability layer. The conductive layer is a relatively thick layer overlying the planar surface of the wafer and the bottom of the features to be filled. Little or no material of the conductive layer is formed on the feature sidewalls. The thick conductive layer on the field provides adequate conductivity for uniform electroplating, while the absence of significant conductive material on the sidewalls decreases the aspect ratio of the feature and makes void-free filling easier to accomplish with electroplating. Further, the absence of significant material on the sidewalls allows a thicker barrier layer to be formed for higher reliability.Type: GrantFiled: August 28, 2002Date of Patent: September 14, 2004Assignee: Novellus Systems, Inc.Inventors: John S. Drewery, Ronald A. Powell
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Patent number: 6774039Abstract: Copper bus bars are formed between adjacent die on a wafer during the process flow. The bus bars are between 50 and 100 &mgr;m wide and between 2 and 5 &mgr;m deep. A barrier layer is formed between the bus bars and the die to prevent copper diffusion. A dielectric layer is deposited over the bus bars and die and etched with contacts and features, such as vias. A seed layer is subsequently deposited over the wafer, which allows electrical conductance between the bus bars and the die during a subsequent electroplating process to fill the features and contacts. The bus bars carry electroplating current from the die edge to the die center. As a result, current does not need to be carried by a low sheet resistivity seed layer from the wafer edge to the center. This allows the seed layer to be thinner and of materials other than copper. Further, thinner seed layers allow thicker barrier layer for more reliability.Type: GrantFiled: August 8, 2002Date of Patent: August 10, 2004Assignee: Novellus Systems, Inc.Inventor: John S. Drewery
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Patent number: 6764168Abstract: In one embodiment, a sensor includes two plates that form a capacitor. A droplet passing between the plates changes the capacitance of the sensor, thereby triggering an amplifier coupled to the sensor to generate an output signal. The output signal is indicative of droplet characteristics and may be used to calibrate a mechanism that dispensed the droplet.Type: GrantFiled: March 1, 2002Date of Patent: July 20, 2004Assignee: Novellus Systems, Inc.Inventors: Henner W. Meinhold, Mark L. Rea, Sachin M. Chinchwadkar, Fred J. Chetcuti, John S. Drewery
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Publication number: 20040136681Abstract: An optical planar waveguide comprising erbium-doped silica glass has an active core with a length of not less than 5 cm, typically in a range of 0.2 cm to 100 meters, preferably 0.5 cm to 5 meters. Preferably, the active core of the planar waveguide has a serpentine shape. The radius of curvature of the serpentine planar waveguide is in a range of about 0.1 mm to 50 mm, preferably about 20 mm. The erbium-doped silica glass has a low concentration of erbium atoms, corresponding to an Er/Si atomic ratio in a range of 10−5 to 2×10−3, preferably in a range of about from 5×10−5 to 3×10−4. A layer of erbium-doped silica glass having a low concentration of erbium is formed on a substrate by sublimating a solid source of an erbium-containing metal organic precursor compound, mixing vaporized molecules of the precursor with other gases for forming silica glass, and: generating a plasma in the reaction mixture.Type: ApplicationFiled: January 10, 2003Publication date: July 15, 2004Applicant: Novellus Systems, Inc.Inventors: John S. Drewery, Douglas D. Cannon
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Patent number: 6756307Abstract: The present invention pertains to apparatus and methods for electroplanarization of metal surfaces having both recessed and raised features, over a large range of feature sizes. The invention accomplishes this by use of a flexible planar cathode and a spacing pad thereon. Methods of the invention are electropolishing methods. During electroplanarization, the flexible planar cathode conforms to the global contour of the work piece (e.g. a wafer) while the spacing pad conforms to local topography of the metal layer being planarized. In this way, dishing is reduced in the final planarized metal layer.Type: GrantFiled: July 29, 2002Date of Patent: June 29, 2004Assignee: Novellus Systems, Inc.Inventors: John Kelly, Wilbert G. H. van den Hoek, John S. Drewery
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Patent number: 6709565Abstract: The present invention pertains to apparatus and methods for planarization of metal surfaces having both recessed and raised features, over a large range of feature sizes. The invention accomplishes this by increasing the fluid agitation in raised regions with respect to recessed regions. That is, the agitation of the electropolishing bath fluid is agitated or exchanged as a function of elevation on the metal film profile. The higher the elevation, the greater the movement or exchange rate of bath fluid. In preferred methods of the invention, this agitation is achieved through the use of a microporous electropolishing pad that moves over (either near or in contact with) the surface of the wafer during the electropolishing process. Thus, methods of the invention are electropolishing methods, which in some cases include mechanical polishing elements.Type: GrantFiled: September 28, 2001Date of Patent: March 23, 2004Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, Robert J. Contolini, Eliot K. Broadbent, John S. Drewery
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Publication number: 20020074238Abstract: The present invention pertains to apparatus and methods for planarization of metal surfaces having both recessed and raised features, over a large range of feature sizes. The invention accomplishes this by increasing the fluid agitation in raised regions with respect to recessed regions. That is, the agitation of the electropolishing bath fluid is agitated or exchanged as a function of elevation on the metal film profile. The higher the elevation, the greater the movement or exchange rate of bath fluid. In preferred methods of the invention, this agitation is achieved through the use of a microporous electropolishing pad that moves over (either near or in contact with) the surface of the wafer during the electropolishing process. Thus, methods of the invention are electropolishing methods, which in some cases include mechanical polishing elements.Type: ApplicationFiled: September 28, 2001Publication date: June 20, 2002Inventors: Steven T. Mayer, Robert J. Contolini, Eliot K. Broadbent, John S. Drewery
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Patent number: 6197165Abstract: Ionized physical vapor deposition (IPVD) is provided by a method of apparatus for sputtering coating material from a compound sputtering source formed of an annular ring-shaped target with a circular target at its center, increasing deposition rate and coating uniformity. Each target is separately energized to facilitate control of the distribution of material sputtered into the chamber and the uniformity of the deposited film. The sputtered material from the targets is ionized in a processing space between the target and a substrate by generating a dense plasma in the space with energy coupled from a coil located outside of the vacuum chamber behind an annular dielectric window in the chamber wall in the central opening of the annular target and surrounding the circular target. A Faraday type shield physically shields the window to prevent coating material from coating the window, while allowing the inductive coupling of energy from the coil into the processing space.Type: GrantFiled: March 3, 1999Date of Patent: March 6, 2001Assignee: Tokyo Electron LimitedInventors: John S. Drewery, Thomas J. Licata
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Patent number: 6080287Abstract: Ionized physical vapor deposition (IPVD) is provided by a method of apparatus for sputtering conductive metal coating material from an annular magnetron sputtering target. The sputtered material is ionized in a processing space between the target and a substrate by generating a dense plasma in the space with energy coupled from a coil located outside of the vacuum chamber behind a dielectric window in the chamber wall at the center of the opening in the sputtering target. Faraday type shields physically shield the window to prevent coating material from coating the window, while allowing the inductive coupling of energy from the coil into the processing space. The location of the coil in the plane of the target or behind the target allows the target to wafer spacing to be chosen to optimize film deposition rate and uniformity, and also provides for the advantages of a ring-shaped source without the problems associated with unwanted deposition in the opening at the target center.Type: GrantFiled: May 6, 1998Date of Patent: June 27, 2000Assignee: Tokyo Electron LimitedInventors: John S. Drewery, Thomas J. Licata