Patents by Inventor John S. Kleine

John S. Kleine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10797490
    Abstract: A battery charge system including an adapter node, a system node, a battery, a first isolation switch coupled between the adapter and system nodes, a second isolation switch coupled between the battery and system nodes, a boost converter, and a controller. The controller turns off the first isolation switch and turns on the second isolation switch during a battery mode, activates the boost converter when an adapter voltage is detected, turns off the second isolation switch when the system voltage rises above the battery voltage, and turns on the first isolation switch when the system voltage rises to an operating voltage level. The boost converter may then be turned off once in the adapter mode. The second isolation switch may initially be turned on partially at a low current level when the adapter is detected, and then turned fully on when the system voltage is at the operating voltage level.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: October 6, 2020
    Assignee: Intersil Americas LLC
    Inventors: Lei Zhao, Jia Wei, John S. Kleine
  • Publication number: 20150280473
    Abstract: A battery charge system including an adapter node, a system node, a battery, a first isolation switch coupled between the adapter and system nodes, a second isolation switch coupled between the battery and system nodes, a boost converter, and a controller. The controller turns off the first isolation switch and turns on the second isolation switch during a battery mode, activates the boost converter when an adapter voltage is detected, turns off the second isolation switch when the system voltage rises above the battery voltage, and turns on the first isolation switch when the system voltage rises to an operating voltage level. The boost converter may then be turned off once in the adapter mode. The second isolation switch may initially be turned on partially at a low current level when the adapter is detected, and then turned fully on when the system voltage is at the operating voltage level.
    Type: Application
    Filed: July 21, 2014
    Publication date: October 1, 2015
    Inventors: LEI ZHAO, JIA WEI, JOHN S. KLEINE
  • Patent number: 8269474
    Abstract: A buck regulator comprises an upper switching transistor connected between a voltage input node and a phase node. A lower switching transistor is connected between the phase node and a ground node. An inductor is connected between the phase node and an output voltage node. Circuitry generates control signals to the upper switching transistor and the lower switching transistor responsive to the output voltage and a reference voltage. The control signals to the lower switching transistor selectively turn off the lower switching transistor responsive to a current direction through the lower switching transistor and an indication of whether a voltage error signal has been clamped at a selected level.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: September 18, 2012
    Assignee: Intersil Americas Inc
    Inventor: John S. Kleine
  • Patent number: 7161332
    Abstract: A phase removal control system for a multiphase DC/DC converter including combination logic, disable logic, and a current detector. The multiphase DC/DC converter includes first and second output phase circuits and a controller providing first and second PWM signals for the first and second output phase circuits, respectively. The combination logic combines the second PWM signal with the first PWM signal when a phase enable signal is de-asserted and while a current detect signal indicates current above a predetermined minimum current level. The disable logic passes the second PWM signal to the second output phase circuit when the phase enable signal is asserted and blocks the second PWM signal from the second output phase circuit when the phase enable signal is de-asserted. The current detector has an input for sensing current through the second output phase circuit and an output providing the current detect signal indicative thereof.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: January 9, 2007
    Assignee: Intersil Americas, Inc.
    Inventors: John S. Kleine, Thomas A. Jochum
  • Patent number: 7064528
    Abstract: A droop amplifier circuit for a DC-DC regulator including an amplifier, at least one first resistive device, a second resistive device, a third resistive device, and a first capacitive device. Each first resistive device is coupled between an output inductor (phase node or current sense node) and the amplifier's non-inverting input. The first capacitive device is coupled between the regulator output and the amplifier's output. The second resistive device is coupled between the regulator output and the amplifier's inverting input. The third resistive device is coupled between the amplifier's inverting input and output. A second capacitive device may be coupled between the regulator output and the amplifier's non-inverting input. A fourth resistive device may be coupled in parallel with the second capacitive device. A relatively small, simple and low performing amplifier is sufficient. Circuit area and power are reduced, and low input offset voltage is more easily achieved.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: June 20, 2006
    Assignee: Intersil Americas, Inc.
    Inventors: Thomas A. Jochum, John S. Kleine
  • Patent number: 7023182
    Abstract: A phase activation control system for a multiphase DC/DC converter including an amplifier circuit and enable logic. The converter includes a first phase circuit providing a first PWM signal and has a reduce input for reducing duty cycle of the first PWM signal. The converter further includes a second phase circuit providing a second PWM signal and having an enable input and an increase input for increasing duty cycle of the second PWM signal. The amplifier circuit has an enable input, a current sense input for sensing output current of the converter and an output providing an adjust signal. The adjust signal is provided to the reduce input of the first phase circuit and to the increase input of the second phase circuit. The enable logic receives a phase enable signal and enables the amplifier circuit and the second phase circuit.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: April 4, 2006
    Assignee: Intersil Americas Inc.
    Inventors: John S. Kleine, Thomas A. Jochum