Abstract: A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

Abstract: A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

Abstract: A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

Abstract: A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

Abstract: A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

Abstract: A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

Abstract: A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.

Abstract: The specification discloses a structure and related method for determining whether a particular BIOS routine is supported on a computer system, and if so, the service number for that BIOS routine. This determination is made by a software program accessing a table which correlates unique identification numbers for each BIOS routine with a BIOS call service number. The presence or absence of a unique identification number in the table is an indication to the calling program whether the BIOS implements the desired BIOS routine. If the unique identification number exists in the table, it thus identifies the service number for the particular BIOS routine.

Abstract: A fan controller is described herein that can be connected to other fan controllers to provide fault information from one controller to the other(s). The fan controllers each control one or more fans. The controllers include signal(s) connected between the controllers that transmit fault information from one fan controller to the other(s) without the involvement of the host processor. Further, the controllers are capable of performing a “free wheeling” test in which idle fans are spun and tested.

Abstract: The specification discloses a system and related method for accessing Basic Input/Output System (BIOS) routines in a computer system having a single microprocessor and multiple software streams, or a multiple microprocessor system. In particular, BIOS routines that modify shared variables, or groups of BIOS routines, are opened for use by a calling software stream to the exclusion of other software streams. After performing desired tasks, the calling software stream closes the BIOS routine or groups of routines, thus making them available to other software streams. In this way, access to shared variables using the BIOS routines is synchronized ensuring that overlapping access, and the corresponding potential for errors, is eliminated.

Abstract: The specification discloses a structure and related method for determining whether a particular BIOS routine is supported on a computer system, and if so, the service number for that BIOS routine. This determination is made by a software program accessing a table which correlates unique identification numbers for each BIOS routine with a BIOS call service number. The presence or absence of a unique identification number in the table is an indication to the calling program whether the BIOS implements the desired BIOS routine. If the unique identification number exists in the table, it thus identifies the service number for the particular BIOS routine.

Abstract: A fan controller is described herein that can be connected to other fan controllers to provide fault information from one controller to the other(s). The fan controllers each control one or more fans. The controllers include signal(s) connected between the controllers that transmit fault information from one fan controller to the other(s) without the involvement of the host processor. Further, the controllers are capable of performing a “free wheeling” test in which idle fans are spun and tested.

Abstract: A computer system in accordance with the present invention provides a method of communicating asynchronous events from a mini-port driver of a computer system to a software component without polling the mini-port driver. The computer system provides a monolithic driver as a dispatch between a mini-port driver and a software component. Until an asynchronous event is detected, an event thread in the monolithic driver to a software component is blocked. When an asynchronous event is detected by the mini-port driver, the mini-port driver calls the monolithic driver with a monolithic driver entry point which queues the event and unblocks the event thread. The monolithic driver provides the asynchronous event to the software component through the unblocked event thread. The event thread is then re-blocked and remains blocked until another asynchronous event is detected. Asynchronous events are thereby communicated from a mini-port driver to a software component without polling the mini-port driver.

Abstract: A cooling system for a high-end server includes four hot-pluggable fans plugged into a fan control board. The fans are arranged in two groups, with each group having two fans, one behind the other. One of the groups of fans is used to cool the processor boards and the other group is used to cool the system I/O board slots. Under normal operation, only one fan from each group is active, while the other fan freewheels, providing redundancy. A fan control board delivers power to each of the fans and further provides a signal, responsive to temperature sensors, to each of the fans to control their speeds. Each of the fans provides a fan fault signal and a fan not present signal to the fan control board. The temperature sensors are placed proximate the processors and I/O components to monitor the operating temperatures thereof, and communicate the respective temperatures back to the fan control board, via I.sup.2 C bus.

Abstract: Apparatus, and an associated method, for determining the level of power supply redundancy in a modular computer system. Determination of the level of power supply redundancy is made dynamically, during on-line operation of the computer system. Reconfiguration of the computer system, such as to increase the load which must be powered by modular power supply components, or removal or addition of power supply components to form portions of the computer system cause initiation of a new determination of the level of power supply redundancy. Indications of inadequate levels of power supply redundancy are provided to a user of the computer system so that corrective action can be taken.

Abstract: A nonintrusive monitoring system is used to determine the onset and duration times of an electrical power outage-caused down condition of a computer without requiring a pre-power outage polling of a running component of the computer and thereby degrading computer system performance. In response to a supply power outage the monitoring system switches on a battery-powered counter device, representatively a digital counter or a real time clock, and then switches the counter device back off in response to resumption of power supply to the computer. A software portion of the monitoring system then detects the count value of the counter device, and utilizes the count value to compute the onset and duration times of the previous power outage.

Abstract: Improved techniques for facilitating identification of a computer system's hardware features to software executing on the computer system are disclosed. In one embodiment, the software is system management software that serves to monitor and control the computer system to reduce failures and/or improve performance. In a general sense, the invention provides a system feature table within a computer system to describe each of the hardware features of the computer system, including feature data and appropriate access mechanisms for additional information. In addition, a user can be notified when the software does not support all the hardware features of the computer system. The invention also is able to identify locations of failing hardware features for easy replacement or examination.

Abstract: Through a menu driven selection procedure, a user is given options for how a server should respond to an actuation of a power switch. In one option, the power switch is disabled to prevent accidental shut down of the power supply in response to power switch actuation. In another option, the shut down of the power supply follows soon after the expiration of a count down timer which is triggered by power switch actuation. A subsequent actuation of the power switch in this option aborts the count down. In yet another option, the shut down of the power supply follows soon after the completion of a graceful shut down of the server operating system which is triggered by power switch actuation. A subsequent actuation of the power switch in this option causes an immediate shut down of the power supply.

Abstract: A computer system or computer server system having redundant devices that are periodically checked in order to determine whether the redundant devices would be operational if the primary devices failed. The primary and redundant devices are in electrical communication with a controller circuit which, in turn, is responsive to a microprocessor and/or the computer's operating system. The primary and redundant devices can be hot-pluggable so that the computer system does not need to be powered down when and if the primary or redundant devices need to be replaced.