Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Abstract: A load frame has an open region exposing a surface of an electronic component. A heat sink is disposed on the load frame and has a surface in thermal contact with the surface of the electronic component. A non-influencing fastener is disposed within a bore in the heat sink and threaded into the load frame for securing the heat sink to the load frame. The non-influencing fastener includes a screw with a head; a tapered ring disposed below the head of the screw and having a tapered lower peripheral surface; a sealing ring engaging the tapered lower peripheral surface of the tapered ring; and a load washer disposed between the sealing ring and the load frame. Compression of the rings by turning of the screw into the load frame causes the sealing ring to expand against the bore of the heatsink. Preferably, the sealing ring has a curved outer surface.

Abstract: An innovative chip testing system and method includes controlling temperature and condensation during testing. Coarse temperature is controlled by providing a desired fluid flow rate and fluid temperature to a cold plate. Fine temperature control is provided by a feedback loop which controls the power dissipation of cartridge heaters installed within the cold plate. Condensation control is provided by insulating various components of the system, manipulation of dry compressed air in enclosures to reduce surface dew point temperatures, usage of cartridge heaters in a card backside stiffener plate, and by providing a heatsink assembly which prevents condensation on the insulation.

Abstract: A chip testing system with improved thermal performance. In a preferred embodiment, a nest assembly of a chip testing apparatus includes tooling balls and a fitted frame for improving alignment of a coldplate and a chip surface. In preferred embodiments, the coldplate is of unibody design. Thermal performance is also improved by balancing the forces exerted on the coldplate using an adjustable hose mounting bracket. The bracket allows the forces exerted by the hoses on the coldplate to be adjusted so they balance and cancel other unwanted forces on the cold plate.

Abstract: A portable testing apparatus operable with a force applying apparatus for testing loading characteristics on an integrated circuit assembly coupled to a circuit board. Included is a housing assembly having a size and shape to simulate an integrated circuit assembly to be tested; a loading element coupled for movement relative to the housing assembly and engageable with a load detecting system for transferring forces thereto in response to forces applied by a force applying apparatus; an interposer which mates the housing assembly to a circuit board; and, a load detecting system associated with the housing assembly for providing signals representative of characteristics of loading forces applied thereto by a force applying apparatus, whereby the load delivery characteristics of a force applying apparatus can be determined. A method of testing is also provided.

Abstract: High melting temperature Pb/Sn 95/5 solder balls are connected to copper pads on the bottom of a ceramic chip carrier substrate by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling.

Abstract: A multichip module subassembly is disclosed which provides for a heatsink, a thermal interface, a module cap upon which a multichip module is mounted, a land grid array interposer, and an assembly cover. The module cap has shimmed load posts and adjustable brackets for precise alignment and loading of the interposer onto the module. The cover may have a springplate for precise preloading of the interposer onto the multichip module for transportation. The multichip module subassembly is easily used as a field replaceable unit.

Abstract: An apparatus and method are disclosed to provide heat pipe cooling for semiconductor chips mounted on a module. Each chip is provided its own heat pipe for cooling. A piston on the end of each heat pipe is loaded against each chip with a predetermined force without the need for counting turns of a screw or use of torque measurement tools. Each heat pipe draws heat away from the chip it is loaded against, carrying the heat to a heat sink for dissipation into the ambient. A large multichip module can be loaded against a land grid array interposer with uniform loading of the interposer. This interposer loading is accomplished independently of the loading of the heat pipes against the chips.

Abstract: A heatsink grounding mechanism and an associated circuit card and computer system. The circuit card includes a printed circuit board to an integrated circuit module is attached. A heatsink is positioned in contact with or in close proximity to the integrated circuit module package. A heatsink grounding piece of the grounding mechanism is utilized to ground the heatsink. The grounding piece includes a substantially rectangular and conductive grounding piece ring that defines an aperture. The dimensions are suitable for receiving and circumventing the integrated circuit module. The grounding piece includes a set of semi-rigid conductive spring arms that extend away from the grounding piece ring. The spring arms are positioned and oriented such that termination points of the spring arms contact grounding pads on the printed circuit board when the grounding piece is compressed between the heatsink and the circuit board.

Abstract: A mechanism has a subassembly that contains a microprocessor. The mechanism allows the microprocessor to be easily installed through frontal or rear access into a rack drawer and subsequently docked into a receiving assembly. The docking mechanism is multi-axis in that installation of the subassembly occurs along a single axis, but docking of the microprocessor occurs along an axis that is normal to the installation axis. Actuation of the installation mechanism is accomplished with a front-to-rear motion which sequentially provides a power connection to the microprocessor and displaces it in a vertical motion. This vertical motion registers and mates the microprocessor with the assembly. The microprocessor is preloaded in its final latched position to restrain it from shock and vibration events while supporting the assembly in a fixed and stable position.

Abstract: An apparatus and a method of mounting an array of different heatsinks to a closely packed array of processors, cache controller devices, and any other type of data processing element utilized within a data processing system. The apparatus includes a metal frame with multiple apertures in the bottom to allow access to the tops of the devices for which heatsinks will be provided. The metal frame has multiple apertures that allow access to the tops of the data processing elements underneath. The metal frame serves as a containment vehicle for multiple heatsinks, and also provides rigidity to the printed circuit board in the particularly vulnerable vicinity of the comers where the devices are attached to the printed circuit board.

Abstract: An apparatus and method therefore mount an array of different heatsinks to a closely packed array of data processing elements utilized within a data processing system. The apparatus includes a metal frame with multiple apertures in the bottom to allow access to the tops of the devices for which heatsinks will be provided. The metal frame has multiple apertures that allow access to the tops of the data processing elements underneath. The metal frame serves as a containment vehicle for multiple heatsinks, and also provides rigidity to the printed circuit board in the particularly vulnerable vicinity of the corners where the devices are attached to the printed circuit board.