Patents by Inventor John Saylor Hayes

John Saylor Hayes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4033027
    Abstract: A process for fabricating semiconductor devices is disclosed. In particular, a method for separating semiconductor wafers into device chips includes the step of forming a photoresist grid pattern underlying the metallization layer on the back face of the wafer. Mechanical means, such as scribing or sawing, are used to penetrate the metal layer, the underlying photoresist layer, and at least a portion of the semiconductor body. Separation then is completed either by breaking, further sawing or etching. The process enables a clean separation to be made through fairly heavy gold or gold alloy coatings which is particularly advantageous for devices which are to be eutectic-bonded to mounting platforms.
    Type: Grant
    Filed: September 26, 1975
    Date of Patent: July 5, 1977
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Richard Barton Fair, John Saylor Hayes, William Morgan Rosser