Patents by Inventor John Schumann

John Schumann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210302076
    Abstract: Examples disclosed herein provide for a method and apparatus for recovering heat energy that is removed from the system during condensation in the form of electricity. A condenser unit utilizes thermoelectric generator (TEG) modules coupled to the exterior of the condenser body to generate electricity from the temperature difference of the vapor inside the unit and the fluid outside the unit. Internal baffles on the interior of the condenser body and external heat fins on the TEG modules increase the heat transfer rate. The condenser unit is modular, and thus may be installed in preexisting systems and may be fabricated in varying sizes depending on the needs of the system. The electricity generated from the condenser unit may be directed to a charge controller, and then may be converted from DC power to AC power, or stored in a battery.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 30, 2021
    Inventor: John Schumann
  • Patent number: 10754791
    Abstract: Examples of techniques for software translation prefetch instructions are described herein. An aspect includes, based on encountering a translation prefetch instruction in software that is being executed by a processor, determining whether an address translation corresponding to the translation prefetch instruction is located in a translation lookaside buffer (TLB) of the processor. Another aspect includes, based on determining that the address translation is not located in the TLB, issuing an address translation request corresponding to the translation prefetch instruction. Another aspect includes storing an address translation corresponding to the address translation request in the TLB.
    Type: Grant
    Filed: January 2, 2019
    Date of Patent: August 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vivek Britto, Bryant Cockcroft, John Schumann, Tharunachalam Pindicura, Shricharan Srivatsan, Yan Xia, Aishwarya Dhandapani
  • Publication number: 20200210346
    Abstract: Examples of techniques for software translation prefetch instructions are described herein. An aspect includes, based on encountering a translation prefetch instruction in software that is being executed by a processor, determining whether an address translation corresponding to the translation prefetch instruction is located in a translation lookaside buffer (TLB) of the processor. Another aspect includes, based on determining that the address translation is not located in the TLB, issuing an address translation request corresponding to the translation prefetch instruction. Another aspect includes storing an address translation corresponding to the address translation request in the TLB.
    Type: Application
    Filed: January 2, 2019
    Publication date: July 2, 2020
    Inventors: VIVEK BRITTO, BRYANT COCKCROFT, John Schumann, Tharunachalam Pindicura, SHRICHARAN SRIVATSAN, YAN XIA, AISHWARYA DHANDAPANI
  • Patent number: 8832502
    Abstract: A method includes executing a first post-silicon testing program by a reference model. During the execution of the first post-silicon testing program, one or more test-cases are generated. The first post-silicon testing program is executed in an offline generation mode. During execution of the first post-silicon testing program each test case is generated in a different memory location. After the execution, generating a second post-silicon testing program that is configured to execute the one or more test-cases. The method further includes executing the second post-silicon testing program on an acceleration platform.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: September 9, 2014
    Assignee: International Business Machines Corporation
    Inventors: Manoj Dusanapudi, Wisam Kadry, Shakti Kapoor, Dimtry Krestyashyn, Shimon Landa, Amir Nahir, John Schumann, Gil Eliezer Shurek, Vitali Sokhin
  • Publication number: 20140032966
    Abstract: A method, apparatus and product for hardware verification using acceleration platform. The method comprising executing a first post-silicon testing program by a reference model, wherein during said executing the first post-silicon testing program one or more test-cases are generated; generating a second post-silicon testing program that is configured to execute the one or more test-cases; and executing the second post-silicon testing program on an acceleration platform.
    Type: Application
    Filed: July 25, 2012
    Publication date: January 30, 2014
    Applicant: International Business Machines Corporation
    Inventors: Manoj Dusanapudi, Wisam Kadry, Shakti Kapoor, Dimtry Krestyashyn, Shimon Landa, Amir Nahir, John Schumann, Gil (Eliezer) Shurek, Vitali Sokhin