Patents by Inventor John-Scott Thomas
John-Scott Thomas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11952305Abstract: In some embodiments, a method for processing an optical fiber includes: drawing an optical fiber through a draw furnace, conveying the optical fiber through a flame reheating device downstream from the draw furnace, wherein the flame reheating device comprises one or more burners each comprising: a body having a top surface and an opposing bottom surface, an opening within the body extending from the top surface through the body to the bottom surface, wherein the optical fiber passes through the opening, and one or more gas outlets within the body; and igniting a flammable gas provided by the one or more gas outlets to form a flame encircling the optical fiber passing through the opening, wherein the flame heats the optical fiber by at least 100 degrees Celsius at a heating rate exceeding 10,000 degrees Celsius/second.Type: GrantFiled: September 30, 2021Date of Patent: April 9, 2024Assignee: CORNING INCORPORATEDInventors: Ravindra Kumar Akarapu, Joel Patrick Carberry, David Alan Deneka, Steven Akin Dunwoody, Kenneth Edward Hrdina, John Michael Jewell, Yuanjie Jiang, Nikolaos Pantelis Kladias, Ming-Jun Li, Barada Kanta Nayak, Dale Robert Powers, Chunfeng Zhou, Vincent Matteo Tagliamonti, Christopher Scott Thomas
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Patent number: 7511754Abstract: Many electrical sensing devices include an array of transducer elements for converting external stimuli to electrical indications. Novel technologies to realize improvements in low power consumption, low noise, and analog output path which occupies minimal die area while maintaining certain data rates are disclosed. A two stage pipeline architecture of the invention in the analog output path maintains fast pixel rates with minimal ADC (analog digital converter) arrangement. A novel power supply and the use of differential amplifiers in connection with a black signal level as a reference voltage are also described.Type: GrantFiled: October 26, 2004Date of Patent: March 31, 2009Assignee: Harusaki Technologies, LLCInventors: John Scott-Thomas, Paul Hua, George Chamberlain
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Patent number: 7019277Abstract: The invention is directed to an imaging device and a method of operating the imaging device, which will reduce banding in the image caused by parasitic capacitance. The imaging device comprises an array of pixels arranged in rows and columns and column signal lines adapted to be selectively coupled to the rows of pixels at predetermined times. Each pixel element has a photodetector coupled to a reset switch for receiving a reset signal to reset the photodetector. The imaging device further includes a precharge circuit adapted to place a voltage on the column signal lines. The method of operating the imaging device includes the steps of applying a precharge voltage to the signal lines, resetting the photodetectors in a row, integrating the photodetector voltage as light impinges on the reset photodetectors, coupling the integrated photodetectors to the signal lines, and sampling the integrated voltage coupled to each of the signal lines.Type: GrantFiled: March 13, 2003Date of Patent: March 28, 2006Assignee: Psion Teklogix Systems Inc.Inventor: John Scott-Thomas
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Publication number: 20050088554Abstract: Many electrical sensing devices include an array of transducer elements for converting external stimuli to electrical indications. Novel technologies to realize improvements in low power consumption, low noise, and analog output path which occupies minimal die area while maintaining certain data rates are disclosed. A two stage pipeline architecture of the invention in the analog output path maintains fast pixel rates with minimal ADC (analog digital converter) arrangement. A novel power supply and the use of differential amplifiers in connection with a black signal level as a reference voltage are also described.Type: ApplicationFiled: October 26, 2004Publication date: April 28, 2005Inventors: John Scott-Thomas, Paul Hua, George Chamberlain
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Publication number: 20040178324Abstract: The invention is directed to an imaging device and a method of operating the imaging device, which will reduce banding in the image caused by parasitic capacitance. The imaging device comprises an array of pixels arranged in rows and columns and column signal lines adapted to be selectively coupled to the rows of pixels at predetermined times. Each pixel element has a photodetector coupled to a reset switch for receiving a reset signal to reset the photodetector. The imaging device further includes a precharge circuit adapted to place a voltage on the column signal lines. The method of operating the imaging device includes the steps of applying a precharge voltage to the signal lines, resetting the photodetectors in a row, integrating the photodetector voltage as light impinges on the reset photodetectors, coupling the integrated photodetectors to the signal lines, and sampling the integrated voltage coupled to each of the signal lines.Type: ApplicationFiled: March 13, 2003Publication date: September 16, 2004Inventor: John Scott-Thomas
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Patent number: 6489798Abstract: A method and apparatus for testing an image sensor array such as a C-MOS imager which has sensing circuits arranged in rows and columns and wherein the sensing circuits include photosensitive devices is described. A reset voltage is applied to the photosensitive device in each of the sensor circuits such that at least adjacent circuits are reset to different voltage levels. The voltage on each photosensitive device is detected and compared to an expected level to determine if and where any faults may exist in the sensing circuits or lines in the array. A different reset voltage may be applied to each of the sensor circuits, however in one embodiment, a supply with only two voltage levels may be used. One voltage level is applied to every second column to provide a supply voltage to the photosensitive devices and to every second row to generate a reset enable signal for the photosensitive devices.Type: GrantFiled: March 30, 2000Date of Patent: December 3, 2002Assignee: Symagery Microsystems Inc.Inventors: John Scott-Thomas, Ron McDonald, Tom Little, George Chamberlain
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Patent number: 6469289Abstract: This invention is directed to a method and apparatus for determining the level of ambient light impinging on a selected number of pixels in an imaging array where each pixel includes a photodiode. The ambient light may be determined by resetting the pixels in the array and by detecting current flow through the photodiodes in a selected number of the pixels as they are being reset. Alternately, the ambient light may be determined by resetting a selected number of the pixels in the array and by detecting current flow through the photodiodes in the selected number of the pixels as they are being reset. The photodiodes are reset by applying a reverse bias voltage across them and the current flow is detected by measuring the current flow through a resistance in parallel to the selected photodiodes. The selected number of pixels may be divided into one or more groups each having at least one pixel, and the pixels in each group may be arranged in specific patterns within the array.Type: GrantFiled: November 21, 2000Date of Patent: October 22, 2002Assignee: Symagery Microsystems Inc.Inventors: John Scott-Thomas, Alex Roustaei, Paul Vulpoiu
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Publication number: 20010054744Abstract: The image sensor comprises an analog memory array integrated on a die with a CMOS sensor array and coupled to the sensor array for receiving light intensity signals from the sensor array. The sensor array may comprise light sensitive pixels arranged in rows and columns equal in number or greater than the number of memory cells in the memory array which are also arranged in rows and columns. The memory cells may be grouped into one or more distinct memory arrays. The image sensor operates in a rolling shutter mode which closely approximates electronic frame capture since the transfer process can be made sufficiently fast. This CMOS image sensor is particularly advantageous since it can be produced without requiring a special manufacturing process and still maintains a high performance level.Type: ApplicationFiled: January 12, 2001Publication date: December 27, 2001Inventor: John Scott-Thomas
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Patent number: 6236746Abstract: A method for analyzing an integrated circuit (IC). At least a portion of a layer of the IC is scanned using high magnification, to obtain images of the IC. The images are registered to create a mosaicked image. An IC layout database is created in the form of a set of polygons from the mosaicked image, where the step of creating the IC layout database is performed after, or pipelined with, the registering step. The process is repeated for plural IC layers, as necessary. Polygon sets from each layer are vertically registered into alignment with minimal distortion. A netlist or schematic diagram is generated to represent the scanned IC portion based on the registered set(s) of polygons.Type: GrantFiled: October 1, 1997Date of Patent: May 22, 2001Assignee: Semiconductor Insights, Inc.Inventors: George Chamberlain, Alexi Ioudovski, John-Scott Thomas, Ghassan Naim
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Patent number: RE44523Abstract: The invention is directed to an imaging device and a method of operating the imaging device, which will reduce banding in the image caused by parasitic capacitance. The imaging device comprises an array of pixels arranged in rows and columns and column signal lines adapted to be selectively coupled to the rows of pixels at predetermined times. Each pixel element has a photodetector coupled to a reset switch for receiving a reset signal to reset the photodetector. The imaging device further includes a precharge circuit adapted to place a voltage on the column signal lines. The method of operating the imaging device includes the steps of applying a precharge voltage to the signal lines, resetting the photodetectors in a row, integrating the photodetector voltage as light impinges on the reset photodetectors, coupling the integrated photodetectors to the signal lines, and sampling the integrated voltage coupled to each of the signal lines.Type: GrantFiled: March 28, 2008Date of Patent: October 8, 2013Assignee: Harusaki Technologies, LLCInventor: John Scott-Thomas