Abstract: An arbitration diagnostic circuit and method provide diagnostic information in arbitration-based systems and/or provide detection of and response to excessive arbitration delays. For example, in one embodiment, an arbitration diagnostic circuit maintains a chronological memory trace of arbitration events, including resource request events and corresponding resource grant events for two or more entities having arbitrated access to a shared resource. The trace, which may be regarded as a running, ordered list, may comprise time-stamped event identifiers, which aid the analysis of arbitration related errors or failures. Indeed, in one or more embodiments, an arbitration diagnostic circuit is configured to track elapsed times for resource requests, and to detect resource grant delay violations.

Abstract: A multimode voltage regulator circuit includes a linear regulator sub-circuit configured to supply current to a load in a low-current mode, responsive to a first control signal from a first control path, as well as a switching regulator sub-circuit configured to supply current to the load in a high-current mode, responsive to a second control signal from a second control path. The circuit further comprises a shared error amplifier configured to generate an error signal based on the difference between a reference voltage and a feedback signal coupled from the load, and a switch configured to selectively route the error signal to the first control path in the low-current mode and to the second control path in the high-current mode.

Abstract: A multimode voltage regulator circuit includes a linear regulator sub-circuit configured to supply current to a load in a low-current mode, responsive to a first control signal from a first control path, as well as a switching regulator sub-circuit configured to supply current to the load in a high-current mode, responsive to a second control signal from a second control path. The circuit further comprises a shared error amplifier configured to generate an error signal based on the difference between a reference voltage and a feedback signal coupled from the load, and a switch configured to selectively route the error signal to the first control path in the low-current mode and to the second control path in the high-current mode.

Abstract: The wireless device described herein uses a single crystal oscillator to generate the high and low frequency clock signals required by the wireless device during both active and inactive radio communications. An exemplary multi-mode clock unit comprises a single crystal oscillator operable in a normal power mode and a reduced power mode, and a control unit that selectively switches the crystal oscillator between the first and second power modes based on a current clock signal quality requirement. The control unit may selectively switch between the first and second power modes by selectively varying a capacitive load of the crystal oscillator and/or by varying a drive signal of the crystal oscillator. For example, the control unit may select the normal power mode when a cellular transceiver is active, and a reduced power mode when the cellular transceiver is inactive to reduce power consumption during the inactive state.

Abstract: An arbitration diagnostic circuit and method provide diagnostic information in arbitration-based systems and/or provide detection of and response to excessive arbitration delays. For example, in one embodiment, an arbitration diagnostic circuit maintains a chronological memory trace of arbitration events, including resource request events and corresponding resource grant events for two or more entities having arbitrated access to a shared resource. The trace, which may be regarded as a running, ordered list, may comprise time-stamped event identifiers, which aid the analysis of arbitration related errors or failures. Indeed, in one or more embodiments, an arbitration diagnostic circuit is configured to track elapsed times for resource requests, and to detect resource grant delay violations.

Abstract: A system and method for providing for simultaneous transmission of user data (the I/O data between a source DTE and a destination DTE) and control and/or status data (the data that the DTE conveys for DCE control and the data the DTE retrieves from the DCE for status purposes, respectively) comprises multiple data paths for the user, control and status data. The user data path utilizes an I/O space while the status and the control data utilize a memory space. Further, an interrupt generator is implemented to indicate to the DCE that a new control command has been received by the DCE. The implementation of this system and method foregoes the requirement of disrupting user data flow or modifying user data flow if there is a need for retrieving DCE status data or for sending to the DCE new control information.