Abstract: An initial condition (IC) behavior module is described for use in a hardware definition language simulation system which operates in two phases. In the first phase, the IC module sets an initial logic condition onto a user-selected node which is to be monitored. The IC module will release the initial condition and then test the node value to determine if the simulation system is able to resolve the node. Alternatively, the IC module may release the node if a user-defined IC time period passes. In the second phase, the IC module monitors the node and reports an error message if the simulated node value becomes unacceptable.

Abstract: A method and system for producing property forms for use in creating design schematics for an integrated circuit using computer-aided design apparatus wherein property forms are produced using a unique sophisticated cell library. The library includes a parameter database that includes base level component description format parameters which provide all of the information that is needed for creating the parameter labels, prompts, data boxes, selectors, etc. for property forms for each logic gate defined in a cell library and for a plurality of operating modes. This allows a single cell library to be used in the creation of a design schematic while permitting parameters of all logic gate instances to be specified at any one of three different design levels or modes, including a mode in which only the drive strength of n-channel type devices is specified, a mode in which the drive strengths of N and P type devices are specified, and a mode in which all of the parameters of all devices are specified.

Abstract: A method and system for producing property forms for use in creating design schematics for an integrated circuit using computer-aided design apparatus wherein property forms are produced using a unique sophisticated cell library. The library includes a parameter database that includes base level component description format parameters which provide all of the information that is needed for creating the parameter labels, prompts, data boxes, selectors, etc. for property forms for each logic gate defined in a cell library and for a plurality of operating modes. This allows a single cell library to be used in the creation of a design schematic while permitting parameters of all logic gate instances to be specified at any one of three different design levels or modes, including a mode in which only the drive strength of n-channel type devices is specified, a mode in which the drive strengths of N and P type devices are specified, and a mode in which all of the parameters of all devices are specified.