Abstract: In one general aspect, an apparatus can include an energy storage device configured to store energy during an unclamped inductive switching test of a target device, and a switch device configured to shunt at least a portion of energy away from the target device in response to the target device changing from a breakdown state to a failure state.

Abstract: A process for forming a vertically conducting semiconductor device includes providing a semiconductor substrate having a topside surface and a backside surface. The semiconductor substrate serves as a terminal of the vertically conducting device for biasing the vertically conducting device during operation. The process also includes forming an epitaxial layer extending over the topside surface of the semiconductor substrate but terminating prior to reaching an edge of the semiconductor substrate so as to form a recessed region along a periphery of the semiconductor substrate. The method also includes forming an interconnect layer extending into the recessed region but terminating prior to reaching an edge of the semiconductor substrate. The interconnect layer electrically contacts the topside surface of the semiconductor substrate in the recessed region to thereby provide a topside contact to the semiconductor substrate.

Abstract: In one general aspect, an apparatus can include an energy storage device configured to store energy during an unclamped inductive switching test of a target device, and a switch device configured to shunt at least a portion of energy away from the target device in response to the target device changing from a breakdown state to a failure state.

Abstract: A process for forming a vertically conducting semiconductor device includes providing a semiconductor substrate having a topside surface and a backside surface. The semiconductor substrate serves as a terminal of the vertically conducting device for biasing the vertically conducting device during operation. The process also includes forming an epitaxial layer extending over the topside surface of the semiconductor substrate but terminating prior to reaching an edge of the semiconductor substrate so as to form a recessed region along a periphery of the semiconductor substrate. The method also includes forming an interconnect layer extending into the recessed region but terminating prior to reaching an edge of the semiconductor substrate. The interconnect layer electrically contacts the topside surface of the semiconductor substrate in the recessed region to thereby provide a topside contact to the semiconductor substrate.

Abstract: A vertically conducting semiconductor device includes a semiconductor substrate having a topside surface and a backside surface. The semiconductor substrate serves as a terminal of the vertically conducting device for biasing the vertically conducting device during operation. An epitaxial layer extends over the topside surface of the semiconductor substrate but terminates prior to reaching an edge of the semiconductor substrate so as to form a recessed region along a periphery of the semiconductor substrate. An interconnect layer extends into the recessed region but terminates prior to reaching an edge of the semiconductor substrate. The interconnect layer electrically contacts the topside surface of the semiconductor substrate in the recessed region to thereby provide a topside contact to the semiconductor substrate.

Abstract: A vertically conducting semiconductor device includes a semiconductor substrate having a topside surface and a backside surface. The semiconductor substrate serves as a terminal of the vertically conducting device for biasing the vertically conducting device during operation. An epitaxial layer extends over the topside surface of the semiconductor substrate but terminates prior to reaching an edge of the semiconductor substrate so as to form a recessed region along a periphery of the semiconductor substrate. An interconnect layer extends into the recessed region but terminates prior to reaching an edge of the semiconductor substrate. The interconnect layer electrically contacts the topside surface of the semiconductor substrate in the recessed region to thereby provide a topside contact to the semiconductor substrate.

Abstract: A vibrating, body-piercing jewelry item having a vibrating motor unit, a housing for the vibrating motor unit, a post, a keeper, retainer or clamping device for holding the item on a wearer's body, a power source for operating the vibrating motor unit, and an actuator for the vibrating motor unit. The vibrating, body-piercing jewelry may be worn on a part of the body that is either unpierced or pierced.

Abstract: A vibrating, body-piercing jewelry item having a vibrating motor unit, a housing for the vibrating motor unit, a post, a keeper, retainer or clamping device for holding the item on a wearer's body, a power source for operating the vibrating motor unit, and an actuator for the vibrating motor unit. The vibrating, body-piercing jewelry may be worn on a part of the body that is either unpierced or pierced.

Abstract: An elevator fixture includes a base plate module with opposed bent ends for mounting on a wall surface, and a housing open at the rear side to receive the base plate module and detachably couple the housing to the base plate module. The housing is formed from a face plate module and a frame module. The face plate module has one or more apertures through which call buttons or other indicating devices extend. The frame module is formed from a plurality of frame portions which are cut to length from an extrusion to match the dimensions of the face plate module. The frame portions are releasably coupled together by tabs and setscrews to releasably retain the face plate. Thus, the fixture can be assembled by selecting from among a plurality of different base plate, face plate and frame modules. The base plate module can include a positioning indicator and a positioning aperture for locating the fixture relative to an existing wall recess and/or in accordance with regulations.