Patents by Inventor John T. Robinson
John T. Robinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11957893Abstract: A neuromodulation therapy is delivered via at least one electrode implanted subcutaneously and superficially to a fascia layer superficial to a nerve of a patient. In one example, an implantable medical device is deployed along a superficial surface of a deep fascia tissue layer superficial to a nerve of a patient. Electrical stimulation energy is delivered to the nerve through the deep fascia tissue layer via implantable medical device electrodes.Type: GrantFiled: August 25, 2020Date of Patent: April 16, 2024Assignee: Medtronic, Inc.Inventors: Brad C. Tischendorf, John E. Kast, Thomas P. Miltich, Gordon O. Munns, Randy S. Roles, Craig L. Schmidt, Joseph J. Viavattine, Christian S. Nielsen, Prabhakar A. Tamirisa, Anthony M. Chasensky, Markus W. Reiterer, Chris J. Paidosh, Reginald D. Robinson, Bernard Q. Li, Erik R. Scott, Phillip C. Falkner, Xuan K. Wei, Eric H. Bonde, David A. Dinsmoor, Duane L. Bourget, Forrest C M Pape, Gabriela C. Molnar, Joel A. Anderson, Michael J. Ebert, Richard T. Stone, Shawn C. Kelley, Stephen J. Roddy, Timothy J. Denison, Todd V. Smith
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Patent number: 11957894Abstract: A neuromodulation therapy is delivered via at least one electrode implanted subcutaneously and superficially to a fascia layer superficial to a nerve of a patient. In one example, an implantable medical device is deployed along a superficial surface of a deep fascia tissue layer superficial to a nerve of a patient. Electrical stimulation energy is delivered to the nerve through the deep fascia tissue layer via implantable medical device electrodes.Type: GrantFiled: August 25, 2020Date of Patent: April 16, 2024Assignee: Medtronic, Inc.Inventors: Anthony M. Chasensky, Bernard Q. Li, Brad C. Tischendorf, Chris J. Paidosh, Christian S. Nielsen, Craig L. Schmidt, David A. Dinsmoor, Duane L. Bourget, Eric H. Bonde, Erik R. Scott, Forrest C M Pape, Gabriela C. Molnar, Gordon O. Munns, Joel A. Anderson, John E. Kast, Joseph J. Viavattine, Markus W. Reiterer, Michael J. Ebert, Phillip C. Falkner, Prabhakar A. Tamirisa, Randy S. Roles, Reginald D. Robinson, Richard T. Stone, Shawn C. Kelley, Stephen J. Roddy, Thomas P. Miltich, Timothy J. Denison, Todd V. Smith, Xuan K. Wei
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Patent number: 9436708Abstract: A method and a computer system for providing a federated wide area motion imagery (WAMI) collection service are provided. The method includes issuing a request to retrieve WAMI collection metadata from a first WAMI collection service in one or more collection services, the one or more WAMI collection services providing WAMI collection metadata; receiving the WAMI collection metadata from the first WAMI collection service; and storing the WAMI collection metadata from the first WAMI collection service in a local cache of the computer system.Type: GrantFiled: March 8, 2013Date of Patent: September 6, 2016Assignee: PIXIA CORP.Inventors: Rahul C. Thakkar, Michael L. Maraist, John T. Robinson
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Publication number: 20140164426Abstract: A method and a computer system for providing a federated wide area motion imagery (WAMI) collection service are provided. The method includes issuing a request to retrieve WAMI collection metadata from a first WAMI collection service in one or more collection services, the one or more WAMI collection services providing WAMI collection metadata; receiving the WAMI collection metadata from the first WAMI collection service; and storing the WAMI collection metadata from the first WAMI collection service in a local cache of the computer system.Type: ApplicationFiled: March 8, 2013Publication date: June 12, 2014Applicant: PIXIA CORP.Inventors: Rahul C. THAKKAR, Michael L. Maraist, John T. Robinson
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Patent number: 8189046Abstract: A communication system for multiple users whereby an automatic indication of away status is prompted immediately upon a user's departure from the vicinity of a computer or other medium. In a preferred embodiment, this is accomplished, in an instant messaging environment, via a video camera arrangement whereby, upon there being a detection of a user's absence from the immediate vicinity, an automatic prompt is made to indicate away status for the user.Type: GrantFiled: July 22, 2008Date of Patent: May 29, 2012Assignee: International Business Machines CorporationInventors: John T. Robinson, Michael E. Wazlowski
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Publication number: 20090083492Abstract: A hardware based method for determining when to migrate cache lines to the cache bank closest to the requesting processor to avoid remote access penalty for future requests. In a preferred embodiment, decay counters are enhanced and used in determining the cost of retaining a line as opposed to replacing it while not losing the data. In one embodiment, a minimization of off-chip communication is sought; this may be particularly useful in a CMP environment.Type: ApplicationFiled: November 17, 2008Publication date: March 26, 2009Applicant: International Business Machines CorporationInventors: Alper Buyuktosunoglu, Zhigang Hu, Jude A. Rivers, John T. Robinson, Xiaowei Shen, Vijayalakshmi Srinivasan
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Publication number: 20080310683Abstract: A communication system for multiple users whereby an automatic indication of away status is prompted immediately upon a user's departure from the vicinity of a computer or other medium. In a preferred embodiment, this is accomplished, in an instant messaging environment, via a video camera arrangement whereby, upon there being a detection of a user's absence from the immediate vicinity, an automatic prompt is made to indicate away status for the user.Type: ApplicationFiled: July 22, 2008Publication date: December 18, 2008Applicant: International Business Machines CorporationInventors: John T. Robinson, Michael E. Wazlowski
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Patent number: 7454573Abstract: A hardware based method for determining when to migrate cache lines to the cache bank closest to the requesting processor to avoid remote access penalty for future requests. In a preferred embodiment, decay counters are enhanced and used in determining the cost of retaining a line as opposed to replacing it while not losing the data. In one embodiment, a minimization of off-chip communication is sought; this may be particularly useful in a CMP environment.Type: GrantFiled: January 13, 2005Date of Patent: November 18, 2008Assignee: International Business Machines CorporationInventors: Alper Buyuktosunoglu, Zhigang Hu, Jude A. Rivers, John T. Robinson, Xiaowei Shen, Vijayalakshmi Srinivasan
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Patent number: 7395373Abstract: Embodiments of a method for reducing conflict misses in a set-associative cache by mapping each memory address to a primary set and at least one overflow set are described. If a conflict miss occurs within the primary set, a cache line from the primary set is selected for replacement. However, rather than removing the selected cache line from the cache completely, the selected cache line may instead be relocated to the overflow set. The selected cache line replaces a cache line in the overflow set, if it is determined that the selected cache line from the primary set has an estimated age that is more recent than an estimated age for any cache line in the overflow set. Embodiments of the method incorporate various techniques for estimating the age of cache lines, and, particularly, for estimating the relative time since any given cache line was last accessed.Type: GrantFiled: September 20, 2005Date of Patent: July 1, 2008Assignee: International Business Machines CorporationInventor: John T. Robinson
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Patent number: 7254578Abstract: A method, apparatus and computer product wherein means and mechanisms are provided whereby, in a distributed or clustered shared file system, (1) concurrency classes may be defined specifying granularity of locking, whether locks are cached, and whether modified data is written-through at the completion of updates, (2) certain files, file types, or files and/or file types as used by given applications or classes of applications, may be associated with concurrency classes, and (3) for each usage of a file by an application, the associated concurrency class determines a policy for choosing specific concurrency and coherency control mechanisms to be used for accessing the given file.Type: GrantFiled: December 10, 2002Date of Patent: August 7, 2007Assignee: International Business Machines CorporationInventors: Murthy V. Devarakonda, John T. Robinson
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Patent number: 7228388Abstract: Arrangements and method for enabling and disabling cache bypass in a computer system with a cache hierarchy. Cache bypass status is identified with respect to at least one cache line. A cache line identified as cache bypass enabled is transferred to one or more higher level caches of the cache hierarchy, whereby a next higher level cache in the cache hierarchy is bypassed, while a cache line identified as cache bypass disabled is transferred to one or more higher level caches of the cache hierarchy, whereby a next higher level cache in the cache hierarchy is not bypassed. Included is an arrangement for selectively enabling or disabling cache bypass with respect to at least one cache line based on historical cache access information.Type: GrantFiled: November 19, 2004Date of Patent: June 5, 2007Assignee: International Business Machines CorporationInventors: Zhigang Hu, John T. Robinson, Xiaowei Shen, Balaram Sinharoy
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Patent number: 7103722Abstract: A method and structure is disclosed for constraining cache line replacement that processes a cache miss in a computer system. The invention contains a K-way set associative cache that selects lines in the cache for replacement. The invention constrains the selecting process so that only a predetermined subset of each set of cache lines is selected for replacement. The subset has at least a single cache line and the set size is at least two cache lines. The invention may further select between at least two cache lines based upon which of the cache lines was accessed least recently. A selective enablement of the constraining process is based on a free space memory condition of a memory associated with the cache memory. The invention may further constrain cache line replacement based upon whether the cache miss is from a non-local node in a nonuniform-memory-access system. The invention may also process cache writes so that a predetermined subset of each set is known to be in an unmodified state.Type: GrantFiled: July 22, 2002Date of Patent: September 5, 2006Assignee: International Business Machines CorporationInventors: Caroline Benveniste, Peter Franaszek, John T. Robinson, Charles Schulz
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Patent number: 6961821Abstract: A method and structure for replacing cache lines in a computer system having a set associative cache memory is disclosed. The method establishes ranking guidelines utilizing a writable cache replacement control array, wherein the guidelines can be dynamically changed by writing data to the cache replacement control array. The invention ranks states of different cache lines according to the ranking guidelines and replaces, upon a cache miss, a cache line having a highest rank of the rankings.Type: GrantFiled: October 16, 2002Date of Patent: November 1, 2005Assignee: International Business Machines CorporationInventor: John T. Robinson
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Patent number: 6901483Abstract: A method for selecting a line to replace in an inclusive set-associative cache memory system which is based on a least recently used replacement policy but is enhanced to detect and give special treatment to the reloading of a line that has been recently cast out. A line which has been reloaded after having been recently cast out is assigned a special encoding which temporarily gives priority to the line in the cache so that it will not be selected for replacement in the usual least recently used replacement process. This method of line selection for replacement improves system performance by providing better hit rates in the cache hierarchy levels above, by ensuring that heavily used lines in the levels above are not aged out of the levels below due to lack of use.Type: GrantFiled: October 24, 2002Date of Patent: May 31, 2005Assignee: International Business Machines CorporationInventors: John T. Robinson, Robert B. Tremaine, Michael E. Wazlowski
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Patent number: 6779088Abstract: A compressed memory system includes a cache, and compressed memory including fixed size storage blocks for storing both compressed data segments and fixed size storage blocks defining a virtual uncompressed cache (VUC) for storing uncompressed data segments to enable reduced data access latency. The compressed memory system implements a system and method for controlling the size of the VUC so as to optimize system performance in a manner which permits the avoidance of operating system intervention which is required in certain circumstances for correct system operation. The system solves-these problems by implementing one or more thresholds, which may be set by the operating system, but which, after being sets control the size of the VUC independently of the operating system or other system software.Type: GrantFiled: October 24, 2000Date of Patent: August 17, 2004Assignee: International Business Machines CorporationInventors: Caroline D. Benveniste, Peter A. Franaszek, John T. Robinson
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Publication number: 20040111422Abstract: A method, apparatus and computer product wherein means and mechanisms are provided whereby, in a distributed or clustered shared file system, (1) concurrency classes may be defined specifying granularity of locking, whether locks are cached, and whether modified data is written-through at the completion of updates, (2) certain files, file types, or files and/or file types as used by given applications or classes of applications, may be associated with concurrency classes, and (3) for each usage of a file by an application, the associated concurrency class determines a policy for choosing specific concurrency and coherency control mechanisms to be used for accessing the given file.Type: ApplicationFiled: December 10, 2002Publication date: June 10, 2004Inventors: Murthy V. Devarakonda, John T. Robinson
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Publication number: 20040083341Abstract: A method for selecting a line to replace in an inclusive set-associative cache memory system which is based on a least recently used replacement policy but is enhanced to detect and give special treatment to the reloading of a line that has been recently cast out. A line which has been reloaded after having been recently cast out is assigned a special encoding which temporarily gives priority to the line in the cache so that it will not be selected for replacement in the usual least recently used replacement process. This method of line selection for replacement improves system performance by providing better hit rates in the cache hierarchy levels above, by ensuring that heavily used lines in the levels above are not aged out of the levels below due to lack of use.Type: ApplicationFiled: October 24, 2002Publication date: April 29, 2004Inventors: John T. Robinson, Robert B. Tremaine, Michael E. Wazlowski
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Publication number: 20040078524Abstract: A method and structure for replacing cache lines in a computer system having a set associative cache memory is disclosed. The method establishes ranking guidelines utilizing a writable cache replacement control array, wherein the guidelines can be dynamically changed by writing data to the cache replacement control array. The invention ranks states of different cache lines according to the ranking guidelines and replaces, upon a cache miss, a cache line having a highest rank of the rankings.Type: ApplicationFiled: October 16, 2002Publication date: April 22, 2004Inventor: John T. Robinson
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Publication number: 20040015660Abstract: A method and structure is disclosed for constraining cache line replacement that processes a cache miss in a computer system. The invention contains a K-way set associative cache that selects lines in the cache for replacement. The invention constrains the selecting process so that only a predetermined subset of each set of cache lines is selected for replacement. The subset has at least a single cache line and the set size is at least two cache lines. The invention may further select between at least two cache lines based upon which of the cache lines was accessed least recently. A selective enablement of the constraining process is based on a free space memory condition of a memory associated with the cache memory. The invention may further constrain cache line replacement based upon whether the cache miss is from a non-local node in a nonuniform-memory-access system. The invention may also process cache writes so that a predetermined subset of each set is known to be in an unmodified state.Type: ApplicationFiled: July 22, 2002Publication date: January 22, 2004Inventors: Caroline Benveniste, Peter Franaszek, John T. Robinson, Charles Schulz
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Patent number: 6587923Abstract: In a computer system having a processor, a memory system including multiple levels of caches L1, L2, . . . , Ln−1 and including main memory Ln, and in which the cache Li−1 includes lines of size s and the cache Li includes lines of size t with t>s, a dual line size cache directory mechanism, in which the contents of a cache Li−1 may be accessed at line size granularity s (in which case it is determined whether a line corresponding to a given memory address is stored in Li−1, and if so its location and status), and in which the contents of Li−1 may also be accessed at line size granularity t (in which case it is determined whether any of the t/s lines of size s residing in the larger line of size t corresponding to a given memory address are stored in Li−1, and if so their locations and status) without multiple sequential accesses to a cache Li−1 directory structure.Type: GrantFiled: May 22, 2000Date of Patent: July 1, 2003Assignee: International Business Machines CorporationInventors: Caroline D. Benveniste, Peter A. Franaszek, John T. Robinson