Abstract: A method and apparatus for operating a compiler to process include statements contained in a source program that specify include files resident at non-connected network locations. The compiler also receives as input include options specifying include file libraries. The compiler initially examines each include option to determine whether it specifies an include file library resident at a non-connected network location. If it does, the compiler establishes a connection with the network location and obtains a list of the contents of the include file library via the connection. The compiler then examines each include statement to determine whether it specifies an include file resident at a non-connected network location. If it does, the compiler establishes a connection with the network location and obtains the include file via the connection. The retrieved include file is then used for compiling the source code to create the object program.

Abstract: A method and apparatus for operating a computer linkage editor to process include statements contained in an input stream that specify object modules resident at non-connected network locations. The linkage editor also receives as input library definition statements specifying object module libraries. The linkage editor initially examines each library definition statement to determine whether it specifies an object module library resident at a non-connected network location. If it does, the linkage editor establishes a connection with the network location and obtains a list of the contents of the object module library via the connection. The linkage editor then examines each include statement to determine whether it specifies an object module resident at a non-connected network location. If it does, the linkage editor establishes a connection with the network location and obtains the object module via the connection.

Abstract: When the hardware needs to perform a disruptive hardware action, such as a stop of one or more central processors, the hardware provides advance notification to all affected operating systems. The advance notification includes the time that the proposed disruptive action is intended to be initiated and its projected duration. In one instance, the hardware does not proceed with the disruptive action until it receives return acknowledgment from the operating systems that the disruptive action can be performed. The operating systems may respond back to the hardware to proceed as planned with the disruptive action or to reinitiate it only after a specified delay. This allows the operating systems time to prepare for any consequences of the disruptive action.

Abstract: In one aspect, a software development technique is capable of efficiently organizing for execution a conditional code segment having multiple associated conditional paths. The development technique employs in association with each path of the code segment, a probability compiler directive which dictates to the compiler a probability for satisfying a conditional test of the associated path. In another aspect, a system/process is capable of optimizing organization of assembled program code for a code's particular execution environment. This optimization approach tunes assembled code organization for each specific execution environment, employing run-time based statistical data collected during performance execution of the assembled code. The execution environment, consisting of hardware, software, and other factors such as workload, input data, etc., can also be collected and employed by an optimizer unit to best reorganize the assembled program code for a current execution environment.

Abstract: In one aspect, a software development technique is capable of efficiently organizing for execution a conditional code segment having multiple associated conditional paths. The development technique employs in association with each path of the code segment, a probability compiler directive which dictates to the compiler a probability for satisfying a conditional test of the associated path. In another aspect, a system/process is capable of optimizing organization of assembled program code for a code's particular execution environment. This optimization approach tunes assembled code organization for each specific execution environment, employing run-time based statistical data collected during performance execution of the assembled code. The execution environment, consisting of hardware, software, and other factors such as workload, input data, etc., can also be collected and employed by an optimizer unit to best reorganize the assembled program code for a current execution environment.

Abstract: A dynamic capability exchange mechanism permits two processing entities to notify each other of initial properties, or processing capabilities, as well as subsequent changes to those properties or capabilities. Before requesting a service, or function, of the other entity, one entity consults a mutual characteristic field (constructed from the current properties, or characteristics) to determine if the service, or function, is jointly available. A transport layer, acting as the communication mechanism between the two entities, provides for bidirectional communications between entities including a Control Program and a Service Call Logical Processor. The transport layer provides multiplexing, priority, failure, pacing, and buffer spanning support.

Abstract: The embodiment provides selective supervisory disablement of fetch protection for a special storage subarea (such as for the first half of the first 4KB block) while fetch protection is enabled for an area containing the subarea by a single storage protect key. That is, the fetch protect for the subarea (normally provided in the fetch protect for the entire area) by the area's protect key is overriden by the selective subarea disablement control, so that accesses to the subarea are not fetch protected by the storage key. The override protection control is secured by its enablement via a field position in a control register only accessible to supervisory programming. Thus, while fetch protection is set on for a predefined 4KB block, the fetch protect override controls can disable the fetch protection for a portion of the block's real addresses (e.g. addresses 0-2047).

Abstract: This is a system which is used to perform reconfiguration of storage elements in order to permit removal of one or more of the elements for servicing or other reasons. If a storage element that is to be taken off line contains material that is crucial to the continued operation of the system, that material is copied to appropriate areas in other storage elements. After all crucial material has been copied to alternate locations, the original storage element can be taken off line for servicing or other purposes.

Abstract: A central processor through an asynchronous service processor, selectively resets an input/output channel designated in an instruction called Clear Channel that is executed by the central processor. As part of the execution of this instruction, the service processor also communicates a reset signal to the peripheral equipment associated with that channel in case the designated channel is malfunctioning and cannot relay a reset signal normally to the peripheral equipment associated with the designated channel. The reset signal for the peripheral equipment is supplied through a connection between the service processor and particular lines in I/O interface cables of that channel. Programming routines that use the Clear Channel instruction are designed to preserve the integrity of data held by peripheral equipment that is associted with two channels when the peripheral equipment has exclusive affiliations with the designated channel.