Patents by Inventor John Tero

John Tero has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8947289
    Abstract: A switched-capacitor amplifier comprises an operational amplifier (op-amp), a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and a plurality of switches connected to these capacitors. The first capacitor equals the third capacitor, the second capacitor equals the fourth capacitor, and the first capacitor is asymmetric to the second capacitor, the third capacitor is asymmetric to the fourth capacitor. A ratio of the first capacitor and the second capacitor is a function of a simulated parasitic capacitance of the switched-capacitor amplifier, a simulated DC gain of the operational amplifier, and a target gain of the switched-capacitor circuit.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: February 3, 2015
    Assignee: Greenvity Communications, Inc.
    Inventors: Junjie Yang, John Tero
  • Publication number: 20140176358
    Abstract: A switched-capacitor amplifier comprises an operational amplifier (op-amp), a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and a plurality of switches connected to these capacitors. The first capacitor equals the third capacitor, the second capacitor equals the fourth capacitor, and the first capacitor is asymmetric to the second capacitor, the third capacitor is asymmetric to the fourth capacitor. A ratio of the first capacitor and the second capacitor is a function of a simulated parasitic capacitance of the switched-capacitor amplifier, a simulated DC gain of the operational amplifier, and a target gain of the switched-capacitor circuit.
    Type: Application
    Filed: August 9, 2013
    Publication date: June 26, 2014
    Applicant: GREENVITY COMMUNICATIONS, INC.
    Inventors: Junjie Yang, John Tero
  • Patent number: 7551907
    Abstract: The invention enables automatic gain control in ultra wideband applications over multiple channels and frequency bands.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: June 23, 2009
    Assignee: Sigma Designs, Inc.
    Inventors: Catherine A. French, Ruoyang Lu, Jayesh Desai, Can Tri Nguyen, Hung C. Nguyen, John Tero
  • Publication number: 20070116105
    Abstract: A receiver has a plurality of antennas, a voltage controlled oscillator (VCO), and a processor. Each antenna is coupled to a receiver channel. The voltage controlled oscillator is coupled to the receiver channels. The processor is coupled to the receiver channels and substantially continuously monitors and merges signals from the receiver channels. All the receiver channels may be integrated on a single circuit such that only a single VCO is required.
    Type: Application
    Filed: November 15, 2006
    Publication date: May 24, 2007
    Inventors: John Tero, Hung Nguyen, Cuong Nguyen
  • Publication number: 20070096971
    Abstract: ADC accuracy is increased by 1 bit by interpolation of comparator outputs in a comparator array, thereby increase accuracy without significant increasing power consumption and size.
    Type: Application
    Filed: October 26, 2006
    Publication date: May 3, 2007
    Inventor: John Tero
  • Publication number: 20070053451
    Abstract: The invention enables automatic gain control in ultra wideband applications over multiple channels and frequency bands.
    Type: Application
    Filed: June 8, 2006
    Publication date: March 8, 2007
    Applicant: Sigma Designs, Inc.
    Inventors: Catherine French, Ruoyang Lu, Jayash Desai, Can Nguyen, Hung Nguyen, John Tero
  • Patent number: 5631607
    Abstract: Compact g.sub.m -control circuits for CMOS rail-to-rail input stages operating in strong inversion are provided. The G.sub.m -control circuit makes the sum of the gate-source voltages of the complementary input transistors, and therefore the g.sub.m of the input stage constant. The compact g.sub.m -control circuits implement a floating voltage source in the form of circuit elements between the N and P-channel input stage transistors and the positive and negative supply rails of the operational amplifier.
    Type: Grant
    Filed: September 6, 1995
    Date of Patent: May 20, 1997
    Assignee: Philips Electronics North America Corporation
    Inventors: Johan H. Huijsing, Ronald Hogervorst, John Tero
  • Patent number: 5023481
    Abstract: An output circuit having the output taken between a pull-up output transistor and a pull-down output transistor connected in series for conducting current alternatively. Separate pull-up and pull-down driver circuits are controlled by a common input signal. The pull-down driver circuit is supplied by a pull-down current source, and a diode is connected from the point between the pull-down driver transistor and pull-down current source to the output node. The effect of a large node capacitance is reduced by the diode, which conducts current from the pull-down current source to any output load capacitance to raise the output voltage more rapidly when the pull-down driver circuit is cut off.
    Type: Grant
    Filed: December 27, 1989
    Date of Patent: June 11, 1991
    Assignee: North American Philips Corporation
    Inventors: John Tero, Shaoan Chin, Bing F. Ma