Patents by Inventor John Tracey
John Tracey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240098417Abstract: Various implementations include audio systems and methods for mixed rendering to enhance audio output. Certain implementations include an audio system having: at least one far-field speaker configured to output a first portion of an audio signal; and a pair of non-occluding near-field speakers configured to output a second portion of the audio signal in synchrony with the output of the first portion of the audio signal, where the second portion of the audio signal increases intelligibility of the speech content within the audio signal.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: James Walter Tracey, Guy Anthony Torio, Eric John Freeman, Nathan Blagrove, Santiago Carvajal
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Patent number: 8959322Abstract: Images for information handling system manufacture and maintenance are created and managed by manipulating the images as virtual machines through a secure remote network interface, such as a virtual private network or virtual desktop infrastructure. Operating system and application installation and updates, such as service packs and patches, are performed on a virtual machine of the image to adjust the image as desired, and then the image is transformed for loading on physical information handling systems, such as newly manufactured information handling systems or deployed information handling systems in need of maintenance.Type: GrantFiled: September 24, 2013Date of Patent: February 17, 2015Assignee: Dell Products L.P.Inventors: John Mullin, Campbell McNeill, Christopher Speers, Dana Ragsdill, John Tracey, Lawrence Smithmier
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Patent number: 8902886Abstract: A method for generating network traffic includes receiving packet header information and an optional packet payload. The received packet header information is arranged in accordance with a predetermined format. A packet of data including the packet payload and a packet header is formatted in accordance with the arranged header information. The predetermined format specifies a particular order in which packet headers are to be arranged.Type: GrantFiled: April 23, 2009Date of Patent: December 2, 2014Assignee: International Business Machines CorporationInventors: Hubertus Franke, Douglas M. Freimuth, David P. Olshefski, John Tracey, Dinesh Verma, Charles P. Wright
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Publication number: 20140026135Abstract: Images for information handling system manufacture and maintenance are created and managed by manipulating the images as virtual machines through a secure remote network interface, such as a virtual private network or virtual desktop infrastructure. Operating system and application installation and updates, such as service packs and patches, are performed on a virtual machine of the image to adjust the image as desired, and then the image is transformed for loading on physical information handling systems, such as newly manufactured information handling systems or deployed information handling systems in need of maintenance.Type: ApplicationFiled: September 24, 2013Publication date: January 23, 2014Applicant: Dell Products L.P.Inventors: John Mullin, Campbell McNeill, Christopher Speers, Dana Ragsdill, John Tracey, Lawrence Smithmier
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Patent number: 8549272Abstract: Images for information handling system manufacture and maintenance are created and managed by manipulating the images as virtual machines through a secure remote network interface, such as a virtual private network or virtual desktop infrastructure. Operating system and application installation and updates, such as service packs and patches, are performed on a virtual machine of the image to adjust the image as desired, and then the image is transformed for loading on physical information handling systems, such as newly manufactured information handling systems or deployed information handling systems in need of maintenance.Type: GrantFiled: February 10, 2010Date of Patent: October 1, 2013Assignee: Dell Products L.P.Inventors: John Mullin, Campbell McNeill, Christopher Speers, Dana Ragsdill, John Tracey, Lawrence Smithmier
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Patent number: 8278704Abstract: A FET is formed as follows. A trench is formed in a silicon region. A shield electrode is formed in a bottom portion of the trench. The shield electrode is insulated from adjacent silicon region by a shield dielectric. A silicon nitride layer is formed over a surface of the silicon region adjacent the trench, along the trench sidewalls, and over the shield electrode and shield dielectric. A layer of LTO is formed over the silicon nitride layer such that those portions of the LTO layer extending over the surface of the silicon region adjacent the trench are thicker than the portion of the LTO layer extending over the shield electrode. The LTO layer is uniformly etched back such that a portion of the silicon nitride layer becomes exposed while portions of the silicon nitride layer remain covered.Type: GrantFiled: October 19, 2010Date of Patent: October 2, 2012Assignee: Fairchild Semiconductor CorporationInventor: John Tracey Andrews
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Publication number: 20110197051Abstract: Images for information handling system manufacture and maintenance are created and managed by manipulating the images as virtual machines through a secure remote network interface, such as a virtual private network or virtual desktop infrastructure. Operating system and application installation and updates, such as service packs and patches, are performed on a virtual machine of the image to adjust the image as desired, and then the image is transformed for loading on physical information handling systems, such as newly manufactured information handling systems or deployed information handling systems in need of maintenance.Type: ApplicationFiled: February 10, 2010Publication date: August 11, 2011Inventors: John Mullin, Campell McNeill, Christopher Speers, Dana Ragsdill, John Tracey, Lawrence Smithmier
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Publication number: 20110031551Abstract: A FET is formed as follows. A trench is formed in a silicon region. A shield electrode is formed in a bottom portion of the trench. The shield electrode is insulated from adjacent silicon region by a shield dielectric. A silicon nitride layer is formed over a surface of the silicon region adjacent the trench, along the trench sidewalls, and over the shield electrode and shield dielectric. A layer of LTO is formed over the silicon nitride layer such that those portions of the LTO layer extending over the surface of the silicon region adjacent the trench are thicker than the portion of the LTO layer extending over the shield electrode. The LTO layer is uniformly etched back such that a portion of the silicon nitride layer becomes exposed while portions of the silicon nitride layer remain covered.Type: ApplicationFiled: October 19, 2010Publication date: February 10, 2011Inventor: John Tracey Andrews
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Patent number: 7855115Abstract: A field effect transistor (FET) is formed as follows. A trench is formed in a silicon region. An oxidation barrier layer is formed over a surface of the silicon region adjacent the trench and along the trench sidewalls and bottom. A protective layer is formed over the oxidation barrier layer inside and outside the trench. The protective layer is partially removed such that a portion of the oxidation barrier layer extending at least along the trench bottom becomes exposed and portions of the oxidation barrier layer extending over the surface of the silicon region adjacent the trench remain covered by remaining portions of the protective layer.Type: GrantFiled: October 8, 2009Date of Patent: December 21, 2010Assignee: Fairchild Semiconductor CorporationInventor: John Tracey Andrews
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Publication number: 20100272125Abstract: A method for generating network traffic includes receiving packet header information and an optional packet payload. The received packet header information is arranged in accordance with a predetermined format. A packet of data including the packet payload and a packet header is formatted in accordance with the arranged header information. The predetermined format specifies a particular order in which packet headers are to be arranged.Type: ApplicationFiled: April 23, 2009Publication date: October 28, 2010Inventors: Hubertus Franke, Douglas M. Freimuth, David P. Olshefski, John Tracey, Dinesh Verma, Charles P. Wright
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Publication number: 20100029083Abstract: A field effect transistor (FET) is formed as follows. A trench is formed in a silicon region. An oxidation barrier layer is formed over a surface of the silicon region adjacent the trench and along the trench sidewalls and bottom. A protective layer is formed over the oxidation barrier layer inside and outside the trench. The protective layer is partially removed such that a portion of the oxidation barrier layer extending at least along the trench bottom becomes exposed and portions of the oxidation barrier layer extending over the surface of the silicon region adjacent the trench remain covered by remaining portions of the protective layer.Type: ApplicationFiled: October 8, 2009Publication date: February 4, 2010Inventor: John Tracey Andrews
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Patent number: 7648877Abstract: A field effect transistor (FET) is formed as follows. A trench is formed in a silicon region. An oxidation barrier layer is formed over a surface of the silicon region adjacent the trench and along the trench sidewalls and bottom. A protective layer is formed over the oxidation barrier layer inside and outside the trench. The protective layer is partially removed such that a portion of the oxidation barrier layer extending at least along the trench bottom becomes exposed and portions of the oxidation barrier layer extending over the surface of the silicon region adjacent the trench remain covered by remaining portions of the protective layer.Type: GrantFiled: June 24, 2005Date of Patent: January 19, 2010Assignee: Fairchild Semiconductor CorporationInventor: John Tracey Andrews
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Publication number: 20060075007Abstract: A system and method for optimizing a storage system to support full utilization of storage space are provided. With the system and method, data objects/containers of data objects are assigned retention values when they are created. These retention values may be dynamically modified based on a modification function associated with the data objects/containers. When storage space needs to be freed for the storage of new data objects/containers, the retention values of existing data objects/containers provide a prioritization as to which data objects/containers should be deleted from the storage system and the order by which these data objects/containers are to be deleted to make available storage space for the new data objects/containers. The identification of the data objects/containers that are to be deleted may be based on a dynamically modified delete threshold, a sorted list of retention values, or the like.Type: ApplicationFiled: September 17, 2004Publication date: April 6, 2006Applicant: International Business Machines CorporationInventors: Kay Anderson, Frederick Douglis, Nagui Halim, John Palmer, Elizabeth Richards, David Tao, William Tetzlaff, John Tracey, Joel Wolf
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Publication number: 20060072400Abstract: A system and method for optimizing a storage system to support short data object lifetimes and highly utilized storage space are provided. With the system and method, data objects are clustered based on when they are anticipated to be deleted. When an application stores data, the application provides an indicator of the expected lifetime of the data, which may be a retention value, a relative priority of the data object, or the like. Data objects having similar expected lifetimes are clustered together in common data structures so that clusters of objects may be deleted efficiently in a single operation. Expected lifetimes may be changed by applications automatically. The system automatically determines how to handle these changes in expected lifetime using one or more of copying the data object, reclassifying the container in which the data object is held, and ignoring the change in expected lifetime for a time to investigate further changes in expected lifetime of other data objects.Type: ApplicationFiled: September 17, 2004Publication date: April 6, 2006Applicant: International Business Machines CorporationInventors: Kay Anderson, Frederick Douglis, Nagui Halim, John Palmer, Elizabeth Richards, David Tao, William Tetzlaff, John Tracey, Joel Wolf
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Publication number: 20060031524Abstract: A number of improvements in network adapters that offload protocol processing from the host processor are provided. Specifically, a mechanism for improving connection establishment in a system utilizing an offload network adapter is provided. The connection establishment mechanism provides the ability to offload connection establishment and maintenance of connection state information to the offload network adapter. As a result of this offloading of connection establishment and state information maintenance, the number of communications needed between the host system and the offload network adapter may be reduced. In addition, offloading of these functions to the offload network adapter permits bulk notification of established connections and state information to the host system rather than piecemeal notifications as is present in known computing systems.Type: ApplicationFiled: July 14, 2004Publication date: February 9, 2006Applicant: International Business Machines CorporationInventors: Douglas Freimuth, Elbert Hu, Ronald Mraz, Erich Nahum, Prashant Pradhan, Sambit Sahu, John Tracey
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Publication number: 20060015618Abstract: A number of improvements in network adapters that offload protocol processing from the host processor are provided. Specifically, an improved mechanism for handling receipt of data packets in a system utilizing an offload network adapter. The offload network adapter may include logic that permits the offload network adapter to delay notification of data reception to the host system in different ways. The advantage of delaying the notice of data packet reception to the host system is the potential for aggregation of several data packets, which can arrive immediately after the first one, for example, in a single notification. Given a stream with continuous data packet arrival, a value may be set, either statically or dynamically, for notification delay and this value may be configurable for the host system per communication socket.Type: ApplicationFiled: July 14, 2004Publication date: January 19, 2006Applicant: International Business Machines CorporationInventors: Douglas Freimuth, Elbert Hu, Ronald Mraz, Erich Nahum, Prashant Pradhan, Sambit Sahu, John Tracey
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Publication number: 20060015651Abstract: A number of improvements in network adapters that offload protocol processing from the host processor are provided. Specifically, mechanisms for handling memory management and optimization within a system utilizing an offload network adapter are provided. The memory management mechanism permits both buffered sending and receiving of data as well as zero-copy sending and receiving of data. In addition, the memory management mechanism permits grouping of DMA buffers that can be shared among specified connections based on any number of attributes. The memory management mechanism further permits partial send and receive buffer operation, delaying of DMA requests so that they may be communicated to the host system in bulk, and expedited transfer of data to the host system.Type: ApplicationFiled: July 14, 2004Publication date: January 19, 2006Applicant: International Business Machines CorporationInventors: Douglas Freimuth, Elbert Hu, Ronald Mraz, Erich Nahum, Prashant Pradhan, Sambit Sahu, John Tracey
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Publication number: 20050131939Abstract: A redundancy elimination mechanism is provided, which applies aspects of duplicate block elimination and delta encoding at the block level. The redundancy elimination mechanism divides file objects into content-defined blocks or “chunks.” Identical chunks are suppressed. The redundancy elimination mechanism also performs resemblance detection on remaining chunks to identify chunks with sufficient redundancy to benefit from delta encoding of individual chunks. Any remaining chunks that do not benefit from delta encoding are compressed. Resemblance detection is optimized by merging groups of fingerprints into super fingerprints. This merging can be constructed to ensure that if two objects have a single super fingerprint in common, they are extremely likely to be substantially similar.Type: ApplicationFiled: December 16, 2003Publication date: June 16, 2005Applicant: International Business Machines CorporationInventors: Frederick Douglis, Purushottam Kulkarni, Jason LaVoie, John Tracey
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Publication number: 20050065632Abstract: A method and apparatus for scalable inquiries in a network of communicating peers are provided. The method and apparatus of the present invention make use of communal filters and randomization to determine which client devices will output a message that is to be broadcast to a community of client devices. Each message is assigned a probability value that is determined based on various criteria or may be determined randomly. The message is then transmitted to the client devices who apply their own respective display criteria to the message parameters to determine if the message is one that is of interest to the user of the client device. If the message is not of interest to the user of the client device, the message is discarded. If the message is of interest to the user, logic is applied to the parameters of the message to determine whether the message should be displayed to the user or not.Type: ApplicationFiled: September 24, 2003Publication date: March 24, 2005Applicant: International Business Machines CorporationInventors: Frederick Douglis, Frank Jania, Jason Lavoie, John Tracey
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Publication number: 20050050187Abstract: A mechanism for bottleneck avoidance is provided in an intelligent adapter. The mechanism allows the adapter to be used such that host/adapter system throughput is optimized. The bottleneck avoidance mechanism of the present invention determines when the adapter becomes a bottleneck. If certain conditions exist, then new connections are refused so that the adapter can process packets for existing connections. If certain other conditions exist, the adapter may migrate workload to the host processor for processing. These conditions may be determined by comparing memory usage or central processing unit usage to predetermined thresholds. Alternatively, the conditions may be determined by comparing adapter response time to host response time.Type: ApplicationFiled: September 3, 2003Publication date: March 3, 2005Applicant: International Business Machines CorporationInventors: Douglas Freimuth, Ronald Mraz, Erich Nahum, Prashant Pradhan, Sambit Sahu, John Tracey