Patents by Inventor John TRAILL

John TRAILL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for enabling temporal alignment of debug information
    Patent number: 10169171
    Abstract: A signal processing device includes at least one timestamp generation component arranged to generate at least one local timestamp value, and to provide the at least one local timestamp value to at least one data link layer module for timestamping of data packets. The signal processing device further includes at least one debug module arranged to receive the at least one local timestamp value and to timestamp debug information based at least partly on the at least one local timestamp value.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: January 1, 2019
    Assignee: NXP USA, Inc.
    Inventors: Joseph Rebello, John Traill
  • METHOD AND APPARATUS FOR ENABLING TEMPORAL ALIGNMENT OF DEBUG INFORMATION
    Publication number: 20160098326
    Abstract: A signal processing device includes at least one timestamp generation component arranged to generate at least one local timestamp value, and to provide the at least one local timestamp value to at least one data link layer module for timestamping of data packets. The signal processing device further includes at least one debug module arranged to receive the at least one local timestamp value and to timestamp debug information based at least partly on the at least one local timestamp value.
    Type: Application
    Filed: May 13, 2013
    Publication date: April 7, 2016
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Joseph REBELLO, John TRAILL