Patents by Inventor John Van Horn

John Van Horn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11931333
    Abstract: A topical composition for treating genital herpes includes dimethyl sulfoxide (DMSO), a diluent, and a quaternary ammonium compound. The topical composition may further contain a cannabinoid component, such as CBD, and/or a terpene and/or an essential oil. The topical composition may be in the form of a two-component composition in which a first topical composition includes dimethyl sulfoxide (DMSO), a diluent, and a quaternary ammonium compound and the second topical composition includes dimethyl sulfoxide (DMSO), a diluent, and a cannabinoid component.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: March 19, 2024
    Inventors: Peter Van Horn, John M. Guynn
  • Patent number: 10402804
    Abstract: A means and method to utilize government-issued food stamp credit to purchase items from a vending machine. The food stamp credit is to be received through a monetary device and validated through the vending machine control network. The network will validate the transaction and allow or limit the type of purchases based on information collected from the food stamp government program rules and regulations. The invention is applicable to any electronic benefit transfer (EBT) type program or analogous transactions.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: September 3, 2019
    Assignee: Fawn Engineering Corporation
    Inventors: Francis A. Wittern, III, John Van Horn
  • Patent number: 10055928
    Abstract: An apparatus, method, and system of dispensing a row of inventory by advancing the row forward. An elongated member has opposite ends, either of which can receive and mount an actuator, e.g. electric motor. A drive member, e.g. a lead screw, extends along the elongated member and is connectable to the actuator. A push member, e.g. plate, linearly moves along the elongated body in response to the drive member. The assembly is highly adjustable. In one aspect, it is self-contained and can be mounted and adjusted in different positions on a support such as a tray, shelf, or frame. In another aspect, it can be selectively configured between different states. One state has the elongated member mounted in the support in one way, with the actuator at the back and the push member extending laterally in a first direction. In another state, the push member extends laterally an opposite direction.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: August 21, 2018
    Assignee: Fawn Engineering Corporation
    Inventor: John Van Horn
  • Patent number: 6351134
    Abstract: An apparatus and a method for simultaneously testing or burning in all the integrated circuit chips on a product wafer. The apparatus comprises a glass ceramic carrier having test chips and means for connection to pads of a large number of chips on a product wafer. Voltage regulators on the test chips provide an interface between a power supply and power pads on the product chips, at least one voltage regulator for each product chip. The voltage regulators provide a specified Vdd voltage to the product chips, whereby the Vdd voltage is substantially independent of current drawn by the product chips. The voltage regulators or other electronic means limit current to any product chip if it has a short. The voltage regulator circuit may be gated and variable and it may have sensor lines extending to the product chip. The test chips can also provide test functions such as test patterns and registers for storing test results.
    Type: Grant
    Filed: May 7, 1999
    Date of Patent: February 26, 2002
    Assignee: International Business Machines Corporation
    Inventors: James Marc Leas, Robert William Koss, Jody John Van Horn, George Frederick Walker, Charles Hampton Perry, David Lewis Gardell, Steve Leo Dingle, Ronald Prilik
  • Publication number: 20020003432
    Abstract: An apparatus and a method for simultaneously testing or burning in all the integrated circuit chips on a product wafer. The apparatus comprises a glass ceramic carrier having test chips and means for connection to pads of a large number of chips on a product wafer. Voltage regulators on the test chips provide an interface between a power supply and power pads on the product chips, at least one voltage regulator for each product chip. The voltage regulators provide a specified Vdd voltage to the product chips, whereby the Vdd voltage is substantially independent of current drawn by the product chips. The voltage regulators or other electronic means limit current to any product chip if it has a short. The voltage regulator circuit may be gated and variable and it may have sensor lines extending to the product chip. The test chips can also provide test functions such as test patterns and registers for storing test results.
    Type: Application
    Filed: May 7, 1999
    Publication date: January 10, 2002
    Inventors: JAMES MARC LEAS, ROBERT WILLIAM KOSS, JODY JOHN VAN HORN, GEORGE FREDERICK WALKER, CHARLES HAMPTON PERRY, DAVID LEWIS GARDELL, STEVE LEO DINGLE, RONALD PRILIK
  • Patent number: 6255208
    Abstract: Selective electrical connections between an electronic component and a test substrate are made using an electrical conductive material. The conductive material of the present invention is a dissolvable material, allowing for rework and repair of a wafer at the wafer-level, and retesting at the wafer-level. In addition, the conductive material may also be used in a permanent package, since the conductive material of the present invention provides complete electrical conductivity and connection between the electronic component and the substrate.
    Type: Grant
    Filed: January 25, 1999
    Date of Patent: July 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: William Emmett Bernier, Claude Louis Bertin, Anilkumar Chinuprasad Bhatt, Michael Anthony Gaynes, Erik Leigh Hedberg, Nikhil M. Murdeshwar, Mark Vincent Pierson, William R. Tonti, Paul A. Totta, Joseph John Van Horn, Jerzy Maria Zalesinski
  • Patent number: 5929651
    Abstract: An apparatus and a method for simultaneously testing or burning in all the integrated circuit chips on a product wafer. The apparatus comprises a glass ceramic carrier having test chips and means for connection to pads of a large number of chips on a product wafer. Voltage regulators on the test chips provide an interface between a power supply and power pads on the product chips, at least one voltage regulator for each product chip. The voltage regulators provide a specified Vdd voltage to the product chips, whereby the Vdd voltage is substantially independent of current drawn by the product chips. The voltage regulators or other electronic means limit current to any product chip if it has a short. The voltage regulator circuit may be gated and variable and it may have sensor lines extending to the product chip. The test chips can also provide test functions such as test patterns and registers for storing test results.
    Type: Grant
    Filed: November 18, 1996
    Date of Patent: July 27, 1999
    Assignee: International Business Machines Corporation
    Inventors: James Marc Leas, Robert William Koss, Jody John Van Horn, George Frederick Walker, Charles Hampton Perry, David Lewis Gardell, Steve Leo Dingle, Ronald Prilik