Patents by Inventor John van Saders

John van Saders has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6853526
    Abstract: A circuit and method are disclosed for protecting an integrated circuit (IC) against transient overvoltages. The circuit comprises a balun transformer and a normally-off transistor. The balun input terminals are connected to an unbalanced circuit, while the balun output terminals are connected to a balanced circuit. The transistor is connected between the balun output terminals and has a gate connected to ground or to some other reference voltage. When an overvoltage transient signal reaches the balun input terminals, the balun transformer converts the transient to a balanced transient signal on the two branches of the balanced circuit. During overvoltage conditions, one balun output terminal will have a voltage which swings low enough that the protection transistor turns on, effectively shorting the overvoltage spike and protecting any upstream (or downstream) IC components from damage. When the transient is over, the transistor returns to the “off” state.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: February 8, 2005
    Assignee: Anadigics, Inc.
    Inventors: John van Saders, Douglas M. Johnson
  • Patent number: 6314008
    Abstract: The present invention uses an AC signal and an external DC control voltage to generate a plurality of levels of output DC voltages. The level of the output voltage is determined by the DC control voltage and has the opposite polarity. The invention is preferably implemented as a balanced circuit, which generates spurious signals at even harmonics of the AC frequency signal. The spurious signals can then be filtered out using a low-pass filter.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: November 6, 2001
    Inventors: Jianwen Bao, John van Saders, Norman Scheinberg
  • Patent number: 6005375
    Abstract: The present invention provides a power amplifier operating with a single power supply. The amplifier includes at least one depletion-mode FET for amplifying an ac signal and a negative voltage generator for providing a bias to the FET. Preferably the amplifier further includes a negative voltage regulator to provide a regulated bias to bias the FET for a class A, AB or B operation. The negative generator includes a multivibrator for producing two clock signals and a charge pump which receives the clock signals and produces a negative voltage. Advantageously the negative voltage is provided as a low reference potential to the multivibrator so that the clock signals it produced include a negative voltage period, which enables the charge pump to operate in a power efficient manner.
    Type: Grant
    Filed: May 5, 1998
    Date of Patent: December 21, 1999
    Inventors: John van Saders, Robert J. Bayruns
  • Patent number: 5952860
    Abstract: The present invention provides a power amplifier operating with a single power supply. The amplifier includes at least one depletion-mode FET for amplifying an ac signal and a negative voltage generator for providing a bias to the FET. Preferably the amplifier further includes a negative voltage regulator to provide a regulated bias to bias the FET for a class A, AB or B operation. The negative generator includes a multivibrator for producing two clock signals and a charge pump which receives the clock signals and produces a negative voltage. Advantageously the negative voltage is provided as a low reference potential to the multivibrator so that the clock signals it produced include a negative voltage period, which enables the charge pump to operate in a power efficient manner.
    Type: Grant
    Filed: May 5, 1998
    Date of Patent: September 14, 1999
    Assignee: Anadigics, Inc.
    Inventors: John van Saders, Robert J. Bayruns
  • Patent number: 5892400
    Abstract: The present invention provides a power amplifier operating with a single power supply. The amplifier includes at least one depletion-mode FET for amplifying an ac signal and a negative voltage generator for providing a bias to the FET. Preferably the amplifier further includes a negative voltage regulator to provide a regulated bias to bias the FET for a class A, AB or B operation. The negative generator includes a multivibrator for producing two clock signals and a charge pump which receives the clock signals and produces a negative voltage. Advantageously the negative voltage is provided as a low reference potential to the multivibrator so that the clock signals it produced include a negative voltage period, which enables the charge pump to operate in a power efficient manner.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: April 6, 1999
    Assignee: Anadigics, Inc.
    Inventors: John van Saders, Robert J. Bayruns