Patents by Inventor John W. Esch

John W. Esch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230049179
    Abstract: A memory for storing a directed acyclic graph (DAG) for access by an application being executed by one or more processors of a computing device is described. The DAG includes a plurality of nodes, wherein each node represents a data point within the DAG. The DAG further includes a plurality of directional edges. Each directional edge connects a pair of the nodes and represents a covering-covered relationship between two nodes. Each node comprises a subgraph consisting of the respective node and all other nodes reachable via a covering path that comprises a sequence of covering and covered nodes. Each node comprises a set of node parameters including at least an identifier and an address range. Each node and the legal address specify a cover path. Utilizing DAG Path Addressing with bindings the memory can be organized to store a generalization hierarchy of logical propositions.
    Type: Application
    Filed: September 22, 2022
    Publication date: February 16, 2023
    Inventor: John W. Esch
  • Patent number: 11580357
    Abstract: A memory for storing a directed acyclic graph (DAG) for access by an application being executed by one or more processors of a computing device is described. The DAG includes a plurality of nodes, wherein each node represents a data point within the DAG. The DAG further includes a plurality of directional edges. Each directional edge connects a pair of the nodes and represents a covering-covered relationship between two nodes. Each node comprises a subgraph consisting of the respective node and all other nodes reachable via a covering path that comprises a sequence of covering and covered nodes. Each node comprises a set of node parameters including at least an identifier and an address range. Each node and the legal address specify a cover path. Utilizing DAG Path Addressing with bindings the memory can be organized to store a generalization hierarchy of logical propositions.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: February 14, 2023
    Assignee: Practical Posets LLC
    Inventor: John W. Esch
  • Patent number: 11494357
    Abstract: A memory for storing a directed acyclic graph (DAG) for access by an application being executed by one or more processors of a computing device is described. The DAG includes a plurality of nodes, wherein each node represents a data point within the DAG. The DAG further includes a plurality of directional edges. Each directional edge connects a pair of the nodes and represents a covering-covered relationship between two nodes (a covering node and a covered node). Each node comprises a subgraph consisting of the respective node and all other nodes reachable via a covering path that comprises a sequence of covering and covered nodes. Nodes present in the subgraph that do not cover any other nodes are leaves of the subgraph. Each node comprises a set of node parameters including at least an identifier and an address range. Each node and the legal address specify a cover path.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: November 8, 2022
    Assignee: Practical Posets LLC
    Inventor: John W. Esch
  • Patent number: 11080334
    Abstract: Methods can include receiving a graphbase comprising a first plurality of nodes and a plurality of edges representing covering-covered relationships between the nodes. Each node can comprise a plurality of node parameters such as a NodeNumber, a Reachable Interval, and an OwnTree Interval. For a traversal ordering of nodes, nodes comprised within the OwnTree Interval are reachable from the node, nodes comprised within the Reachable Interval may be reachable from the node, and nodes comprised within neither interval are not reachable by the node. Methods can additionally include the steps of receiving a first and second sub-set of nodes, the sub-sets being a sub-set of the first plurality of nodes. Furthermore, a relationship between the first and second sub-set can be determined using the NodeNumber, the OwnTree Interval, and the Reachable Interval.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: August 3, 2021
    Assignee: PRACTICAL POSETS LLC
    Inventor: John W. Esch
  • Patent number: 4964063
    Abstract: Conceptual structures which can be used to represent any knowledge that can be represented by frames/units. Its realization, in a software program called Unit Interface, provides a method of storing frame/unit data in conceptual structures and algorithms for accessing that data when stored in conceptual structures as if it were a frame/unit or collection of them.
    Type: Grant
    Filed: September 15, 1988
    Date of Patent: October 16, 1990
    Assignee: Unisys Corporation
    Inventor: John W. Esch
  • Patent number: 4506325
    Abstract: A method of and apparatus for encoding computer program instructions and data greatly reduces the total storage requirements. Upon compiling each computer program segment, statistics are generated regarding the frequency of use of each unique program operator and each unique program operand. The operators and operands are encoded using the information theoretic encoding technique. A conversion table is also prepared which enables the object computer to translate the encoded operands and operators during that time when the computer program segment is being executed. Apparatus within the object computer decodes the encoded operands and operators using the conversion tables enabling execution of the computer program segment.
    Type: Grant
    Filed: November 15, 1982
    Date of Patent: March 19, 1985
    Assignee: Sperry Corporation
    Inventors: Donald B. Bennett, John W. Esch