Patents by Inventor John W. Ladd
John W. Ladd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11462581Abstract: An apparatus for forming a color image of a scene and a method for utilizing that apparatus are disclosed. The apparatus includes a plurality of pixel sensors. Each pixel sensor includes a first photodetector includes first main photodiode and a first floating diffusion node. The first main photodiode is characterized by a first light conversion efficiency as a function of wavelength of a light signal incident thereon. The first floating diffusion node includes a parasitic photodiode characterized by a second light conversion efficiency as a function of the wavelength. The second light conversion efficiency is different from the first light conversion efficiency as a function of wavelength. A controller generates an intensity of light in each of a plurality of wavelength bands for the pixel sensor utilizing a measurement of the light signal by each of the first main photodiode and the first parasitic photodiode in that photodetector.Type: GrantFiled: May 31, 2017Date of Patent: October 4, 2022Assignee: BAE Systems Imaging Solutions Inc.Inventors: John W. Ladd, James E. Crouch, Alberto M. Magnani
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Publication number: 20210358992Abstract: An imaging array and a method of operating an imaging array are disclosed. The imaging array includes a plurality of pixel sensors. At least one of the pixel sensors includes a photodiode, and a transfer gate connecting the photodiode to a floating diffusion node, a reset circuit, and a buffer adapted to generate a voltage indicative of a potential on the floating diffusion node on a bit line. The imaging array also includes a signal generator and a controller. The signal generator controls the potential at which electrons in the photodiode well are transferred to the floating diffusion node well. The controller causes the transfer gate signal generator to lower the potential on the transfer gate during an integration period such that electrons will be transferred from the photodiode well to the floating diffusion node well if the photodiode potential is less than the floating diffusion node potential.Type: ApplicationFiled: June 3, 2019Publication date: November 18, 2021Inventors: Alberto M. Magnani, John W. Ladd
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Publication number: 20210225913Abstract: An apparatus for forming a color image of a scene and a method for utilizing that apparatus are disclosed. The apparatus includes a plurality of pixel sensors. Each pixel sensor includes a first photodetector includes first main photodiode and a first floating diffusion node. The first main photodiode is characterized by a first light conversion efficiency as a function of wavelength of a light signal incident thereon. The first floating diffusion node includes a parasitic photodiode characterized by a second light conversion efficiency as a function of the wavelength. The second light conversion efficiency is different from the first light conversion efficiency as a function of wavelength. A controller generates an intensity of light in each of a plurality of wavelength bands for the pixel sensor utilizing a measurement of the light signal by each of the first main photodiode and the first parasitic photodiode in that photodetector.Type: ApplicationFiled: May 31, 2017Publication date: July 22, 2021Inventors: John W. Ladd, James E. Crouch, Alberto M. Magnani
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Patent number: 9344647Abstract: An imaging system may include an image sensor having an array of image pixels. Each image pixel may include an electronic shutter for controlling when a photosensor in the image pixel accumulates charge. The electronic shutter may be operable in an open state during which charge is allowed to accumulate on the photosensor and a closed state during which charge is drained from the photosensor. The electronic shutter may be cycled through multiple open and closed states during an image frame capture. At the end of each open state, the charge that has been acquired on the photosensor may be transferred from the photosensor to a pixel memory element. By breaking up the total exposure time for a pixel during an image frame into shorter, non-continuous periods of exposure time, dynamic scenery image artifacts may be minimized while maintaining the desired total exposure time.Type: GrantFiled: August 28, 2013Date of Patent: May 17, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Gennadiy Agranov, Sergey Velichko, John W. Ladd
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Publication number: 20150009375Abstract: An imaging system may include an image sensor having an array of image pixels. Each image pixel may include an electronic shutter for controlling when a photosensor in the image pixel accumulates charge. The electronic shutter may be operable in an open state during which charge is allowed to accumulate on the photosensor and a closed state during which charge is drained from the photosensor. The electronic shutter may be cycled through multiple open and closed states during an image frame capture. At the end of each open state, the charge that has been acquired on the photosensor may be transferred from the photosensor to a pixel memory element. By breaking up the total exposure time for a pixel during an image frame into shorter, non-continuous periods of exposure time, dynamic scenery image artifacts may be minimized while maintaining the desired total exposure time.Type: ApplicationFiled: August 28, 2013Publication date: January 8, 2015Applicant: Aptina Imaging CorporationInventors: Gennadiy Agranov, Sergey Velichko, John W. Ladd
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Patent number: 8130304Abstract: An image sensor has an array of pixels of different colors. The pixels may be arranged in a repeating pattern of eight pixels having four rows and two columns. During charge summing operations, the first and third rows may share a floating diffusion and the second and fourth rows may share a floating diffusion. When charge summing is inactive, transfer gates in the first and second columns may be controlled independently, while transfer gates in pairs of rows may be controlled simultaneously. When charge summing is active, summed charges from pixels of the same color in the first and third rows may be placed on the floating diffusion shared by the first and third rows and summed charges from pixels of the same color in the second and fourth rows may be placed on the floating diffusion shared by the second and fourth rows.Type: GrantFiled: July 24, 2009Date of Patent: March 6, 2012Assignee: Aptina Imaging CorporationInventors: Zhiping Yin, John W. Ladd
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Publication number: 20110019051Abstract: An image sensor has an array of pixels of different colors. The pixels may be arranged in a repeating pattern of eight pixels having four rows and two columns. During charge summing operations, the first and third rows may share a floating diffusion and the second and fourth rows may share a floating diffusion. When charge summing is inactive, transfer gates in the first and second columns may be controlled independently, while transfer gates in pairs of rows may be controlled simultaneously. When charge summing is active, summed charges from pixels of the same color in the first and third rows may be placed on the floating diffusion shared by the first and third rows and summed charges from pixels of the same color in the second and fourth rows may be placed on the floating diffusion shared by the second and fourth rows.Type: ApplicationFiled: July 24, 2009Publication date: January 27, 2011Inventors: Zhiping Yin, John W. Ladd
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Publication number: 20080258187Abstract: An imager sensor cell design having readout circuitry contained within the photodiode region.Type: ApplicationFiled: April 18, 2007Publication date: October 23, 2008Inventors: John W. Ladd, Gennadiy Agranov
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Patent number: 7266879Abstract: A method for establishing electrical contact includes nonrigidly applying force to a semiconductor substrate in directions substantially normal to a plane of the semiconductor substrate includes a first member with an electrically conductive element and a first attractive element and a second member that includes a support element and a second attractive element. The first and second attractive elements may be attracted to one another to secure the first and second members of the electrical connector to the semiconductor substrate in a manner that facilitates communication between the electrically conductive element of the first member and one or more semiconductor devices carried upon the semiconductor substrate. The electrical connector may be used in stress testing of semiconductor devices or to otherwise establish an electrical connection between one or more semiconductor devices, a ground, and a power source.Type: GrantFiled: January 11, 2002Date of Patent: September 11, 2007Assignee: Micron Technology, Inc.Inventor: John W. Ladd
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Patent number: 7032288Abstract: An electrical connector configured to nonrigidly apply force to a semiconductor substrate in directions substantially normal to a plane of the semiconductor substrate includes a first member with an electrically conductive element and a first attractive element and a second member that includes a support element and a second attractive element. Attractive forces, such as magnetic attraction, between the first and second attractive elements secure the first and second members of the electrical connector to the semiconductor substrate in a manner that facilitates communication between the electrically conductive element of the first member and one or more semiconductor devices carried upon the semiconductor substrate. The electrical connector may be used in stress testing of semiconductor devices or to otherwise establish an electrical connection between one or more semiconductor devices, a ground, and a power source.Type: GrantFiled: November 7, 2001Date of Patent: April 25, 2006Assignee: Micron Technology, Inc.Inventor: John W. Ladd
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Publication number: 20020104212Abstract: An electrical connector configured to nonrigidly apply force to a semiconductor substrate in directions substantially normal to a plane of the semiconductor substrate. The electrical connector includes a first member with an electrically conductive element and a first attractive element and a second member that includes a support element and a second attractive element. Attractive forces, such as magnetic attraction, between the first and second attractive elements secure the first and second members of the electrical connector to the semiconductor substrate in a manner that facilitates communication between the electrically conductive element of the first member and one or more semiconductor devices carried upon the semiconductor substrate. The electrical connector may be used in stress testing of semiconductor devices or to otherwise establish an electrical connection between one or more semiconductor devices, a ground, and a power source.Type: ApplicationFiled: January 11, 2002Publication date: August 8, 2002Inventor: John W. Ladd
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Publication number: 20020106911Abstract: An electrical connector configured to nonrigidly apply force to a semiconductor substrate in directions substantially normal to a plane of the semiconductor substrate. The electrical connector includes a first member with an electrically conductive element and a first attractive element and a second member that includes a support element and a second attractive element. Attractive forces, such as magnetic attraction, between the first and second attractive elements secure the first and second members of the electrical connector to the semiconductor substrate in a manner that facilitates communication between the electrically conductive element of the first member and one or more semiconductor devices carried upon the semiconductor substrate. The electrical connector may be used in stress testing of semiconductor devices or to otherwise establish an electrical connection between one or more semiconductor devices, a ground, and a power source.Type: ApplicationFiled: November 7, 2001Publication date: August 8, 2002Inventor: John W. Ladd
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Patent number: 6340302Abstract: An electrical connector configured to nonrigidly apply force to a semiconductor substrate in directions substantially normal to a plane of the semiconductor substrate. The electrical connector includes a first member with an electrically conductive element and a first attractive element and a second member that includes a support element and a second attractive element. Attractive forces, such as magnetic attraction, between the first and second attractive elements secure the first and second members of the electrical connector to the semiconductor substrate in a manner that facilitates communication between the electrically conductive element of the first member and one or more semiconductor devices carried upon the semiconductor substrate. The electrical connector may be used in stress testing of semiconductor devices or to otherwise establish an electrical connection between one or more semiconductor devices, a ground, and a power source.Type: GrantFiled: February 6, 2001Date of Patent: January 22, 2002Assignee: Micron Technology, Inc.Inventor: John W. Ladd