Patents by Inventor John W. Lott

John W. Lott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4965702
    Abstract: An improved integrated chip carrier package contains closely spaced electrical leads which facilitates contact with leads from the chip.
    Type: Grant
    Filed: June 19, 1989
    Date of Patent: October 23, 1990
    Assignee: E. I. Du Pont de Nemours and Company
    Inventors: John W. Lott, Thomas R. Poulin, Patrick W. Wallace
  • Patent number: 4460427
    Abstract: Process for the preparation of flexible circuits formed from flexible photohardenable elements having at least one organic elastomeric polymeric binder which comprises(a) exposing imagewise said element,(b) applying particulate conductive metal, e.g., nickel, copper, to the unexposed image areas, optionally(c) heating the metal bearing areas, then(d) removing excess metal particles, optionally(e) fixing the particulate metal to the layer by heating, exposing to UV light or mechanical embedding, and(f) plating electrolessly or soldering the metal containing areas. The process can be operated continuously to prepare single and double layer flexible printed circuits, membrane switches, etc.
    Type: Grant
    Filed: July 5, 1983
    Date of Patent: July 17, 1984
    Assignee: E. I. DuPont de Nemours and Company
    Inventors: Douglas M. Haney, John W. Lott
  • Patent number: 4411980
    Abstract: Process for the preparation of flexible circuits formed from flexible photohardenable elements having at least one organic elastomeric polymeric binder which comprises(a) exposing imagewise said element,(b) applying particulate conductive metal, e.g., nickel, copper, to the unexposed image areas, optionally(c) heating the metal bearing areas, then(d) removing excess metal particles, optionally(e) fixing the particulate metal to the layer by heating, exposing to UV light or mechanical embedding, and(f) plating electrolessly or soldering the metal containing areas. The process can be operated continuously to prepare single and double layer flexible printed circuits, membrane switches, etc.
    Type: Grant
    Filed: September 21, 1981
    Date of Patent: October 25, 1983
    Assignee: E. I. Du Pont de Nemours and Company
    Inventors: Douglas M. Haney, John W. Lott
  • Patent number: 4360570
    Abstract: Electrically conductive through-holes in a substrate are prepared by (a) laminating a film based plastic photosensitive toner-receptive stratum to at least one surface of the substrate; (b) applying a pressure differential across the stratum covering the substrate holes, the outside pressure exceeding that inside the holes; in either order (c) removing at least one film base or (d) exposing the photosensitive stratum imagewise, (e) adhering metal or catalytic particles to hole walls and image areas, (f) optionally hardening or curing the particulate areas and (g) providing an electrically conductive printed circuit and through-holes, e.g., by plating metal electrolessly, soldering or conjoining the metallized or catalyzed areas.
    Type: Grant
    Filed: June 15, 1981
    Date of Patent: November 23, 1982
    Assignee: E. I. Du Pont de Nemours and Company
    Inventors: Sam Andreades, Grant A. Beske, John W. Lott
  • Patent number: 4283243
    Abstract: Electrically conductive through-holes in a substrate are prepared by (a) laminating a film based plastic photosensitive toner-receptive stratum to at least one surface of the substrate; (b) applying a pressure differential across the stratum covering the substrate holes, the outside pressure exceeding that inside the holes; in either order (c) removing at least one film base or (d) exposing the photosensitive stratum imagewise, (e) adhering metal or catalytic particles to hole walls and image areas, (f) optionally hardening or curing the particulate areas and (g) providing an electrically conductive printed circuit and through-holes, e.g., by plating metal electrolessly, soldering or conjoining the metallized or catalyzed areas.
    Type: Grant
    Filed: March 20, 1980
    Date of Patent: August 11, 1981
    Assignee: E. I. Du Pont de Nemours and Company
    Inventors: Sam Andreades, Grant A. Beske, John W. Lott