Abstract: Provided are a method, system, and article of manufacture for generating a challenge response image including a recognizable image. A challenge image is generated including random elements and a recognizable image. The challenge image is transmitted to a recipient. Recipient input associated with the transmitted challenge image is received. A determination is made as to whether the received recipient input matches a descriptor associated with the recognizable image in the challenge image. Indication is made that the recipient correctly identified the recognizable image.

Abstract: Provided are a method, system, and article of manufacture for generating a challenge response image including a recognizable image. A challenge image is generated including random elements and a recognizable image. The challenge image is transmitted to a recipient. Recipient input associated with the transmitted challenge image is received. A determination is made as to whether the received recipient input matches a descriptor associated with the recognizable image in the challenge image. Indication is made that the recipient correctly identified the recognizable image.

Abstract: Apparatus and method provide for forming a modular medical device by selecting a combination of medical device modules and combining them to form the modular medical device, for example by plugging them together or into a common bus. In one embodiment, the modules are selected from a group of modules adapted to be used in combination to perform one or more medical functions for a particular patient. In one embodiment at least one module is adapted to store data, at least one module is adapted to perform a communication function, at least one module is used to control the medical device, at least one module is adapted to provide a sense function, and at least one module provides energy to the medical device. In another embodiment the modular medical devices may be rented or sold to patients, or prescribed by physicians and covered by medical insurance.

Abstract: An integrated circuit includes a self-description data store that stores a self-description of at least a portion of the integrated circuit device. The self-description includes at least some connectivity information indicating a structure of the integrated circuit device. The integrated circuit self-description may be referred to as a circuit netlist attachment or CNA.

Abstract: An optical and/or electrical communication and structural fabric, method and system. For one aspect, an optical fabric is embedded within a structure to communicate an optical and/or electrical signal and to stiffen the structure. The structure may be a circuit board, for example, and the optical cloth may be used to interconnect devices coupled to the circuit board. For another aspect, the structure may be a different type of structure such as, for example, part of a vehicle, airplane or other structure.

Abstract: A method and apparatus for utilizing multiple microcode flow synonyms or hardware flow synonyms for an instruction is disclosed. In one embodiment, a microcode synonym is created for execution on two or more execution units of differing types. One microcode synonym may be chosen for execution depending upon the availability status of the execution units. In another embodiment, several microcode synonyms may be chosen for execution. The results of the first microcode synonym to complete execution may be retired. If the results of execution of two microcode synonyms do not match, a fault exception may be raised.

Abstract: A self-rewinding circuit includes a first block of combinatorial logic having a set of inputs including at least one input and a set of outputs including at least one output wherein a relationship between the set of inputs and the set of outputs is defined by a first input-output function. A first rewind circuit is coupled between the set of outputs and the set of inputs to implement an inversion of the input-output function.

Abstract: A die frame logic analyzer unit. For one aspect, a programmable logic analyzer unit is provided, wherein at least a first portion of the programmable logic analyzer unit is provided in a die frame. The programmable logic analyzer unit is to test a function of an integrated circuit on a wafer that includes the die frame.

Abstract: A cellular automaton cache memory architecture. On a micro-processor that is also capable of executing general-purpose instructions, a cache memory is provided to store instructions and data for use by the processor. The cache memory is further capable of storing data representing a first state of a cellular automaton at a first time step, where the data is organized in cells. A cellular automaton prefetch unit prefetches data associated with a cell to be updated and a neighborhood buffer stores the prefetched data. A cellular automaton update unit provides data from the neighborhood buffer to an update engine. The update engine includes a microprocessor execution unit capable of executing at least some general purpose microprocessor instructions and updates at least some of the selected cells according to an update rule and a state of any associated neighborhood cells to provide a state of the cellular automaton at a second time step.

Abstract: An integrated circuit-based compound eye includes a plurality of photodetector elements disposed on a semiconductor substrate. A compound light directing member includes a light pipe bundle wherein at least some of the light pipes are to individually direct light energy from one or more sources onto one or more of the photodetector elements. The compound light directing member is the primary mechanism to direct light energy onto the one or more of the photodetector elements. Outputs of the photodetector elements are electrically coupled in such a way that an image associated with the source may be synthesized at output circuitry. For another aspect, a compound exposure determining member includes a plurality of light scanning elements, each of the light scanning elements including an integrated photodetector.

Abstract: An integrated circuit includes a self-description data store that stores a self-description of at least a portion of the integrated circuit device. The self-description includes at least some connectivity information indicating a structure of the integrated circuit device. The integrated circuit self-description may be referred to as a circuit netlist attachment or CNA.

Abstract: A die frame logic analyzer unit. For one aspect, a programmable logic analyzer unit is provided, wherein at least a first portion of the programmable logic analyzer unit is provided in a die frame. The programmable logic analyzer unit is to test a function of an integrated circuit on a wafer that includes the die frame.

Abstract: An integrated circuit-based compound eye includes a plurality of photodetector elements disposed on a semiconductor substrate. A compound light directing member includes a plurality of light directing elements wherein at least some of the light directing elements are to individually direct light energy from one or more sources onto one or more of the photodetector elements. The compound light directing member is the primary mechanism to direct light energy onto the one or more of the photodetector elements. Outputs of the photodetector elements are electrically coupled in such a way that an image associated with the source may be synthesized at output circuitry.

Abstract: A cellular automaton cache memory architecture. On a general-purpose processor, a cache memory is provided to store instructions and data for use by the processor. The cache memory is further capable of storing data representing a first state of a cellular automaton at a first time step, where the data is organized in cells. A cellular automaton update unit provides data from selected cells of the cellular automaton to an update engine. The update engine updates at least some of the selected cells according to an update rule and a state of any associated neighborhood cells to provide a state of the cellular automaton at a second time step.

Abstract: An on-chip logic analyzer unit. An integrated circuit includes a programmable logic analyzer unit embedded within the integrated circuit to test a function of the integrated circuit.