Abstract: An apparatus for use in testing IC chips on a semiconductor wafer is disclosed that allows the wafer and an electrical probe to be independently positioned and then clamped together and moved as a single unit when they are in alignment. This permits a chip on a wafer to be supplied with power and tested electronically while any desired area of the chip can be positioned in the field of view of a scanning electron microscope for examination, such as with a voltage-contrast secondary-electron detector. Use of the disclosed apparatus will greatly facilitate and simplify the testing of unbonded chips on semiconductor wafers.

Abstract: Benchmark detector (46) has two light pipe fingers (48, 50) which lie adjacent to each other at an acute angle to the orthogonal axes of movement of the stage on which the benchmark is positioned. The light pipe fingers have notches which define a rectangular opening therebetween through which a benchmark (52) can be excited to produce secondary electrons. Scintillator material adjacent the notches produces photons in the light pipes so that the position of the benchmark with respect to the detector can be established.

Abstract: Base plate 32 of the wafer support is flexibly mounted with respect to the floor 34 of the target chamber. Flanges 54 and 58 flex by operation of motor 68 to adjust the position of the wafer support with respect to the focal point of the column.

Abstract: An apparatus is provided for assembling information concerning the occurrence of a channel error to form a channel error event consisting of four fields: a channel function field; a field identifying the I/O register in use at the occurrence of the channel error; a field identifying the particular I/O adapter using the channel when the error occurred; and a field specifying the type of channel error. The four-field channel error event is placed in an I/O event stack accessible to the CPU, and the CPU is notified of the addition to the I/O event stack. If the attempt to store the channel error event on the I/O event stack fails, the channel is stopped until the CPU signals the channel to restart and to again attempt to log the channel error event on the I/O event stack.

Abstract: Electron beam lens 22 can be operated in a first mode to demagnify and focus the image of electron source 14 at image plane 32. Electron optical lens 34 and 46 further demagnify the image plate 32 through the focal point 60 on the face of target 58 to provide a scannable exposure spot. Electron optical lens 22 can be operated in the second mode which floods aperture 32 so that the image of the aperture is demagnified and focused on target 58 to provide a large exposure area.

Abstract: In a paged, virtual memory computer system an apparatus is provided for enabling I/O device adapters to request the CPU to allocate or resolve virtual pages into main storage pages as required for I/O data transfers. The I/O adapter provides the channel virtual address information specifying the requested page and channel function information which indicates whether the requested page is to be transferred from secondary storage into main storage or merely allocated as a page in main storage. The channel forms the virtual address information and the channel function information into a page request function event which is stored in an I/O event stack in main storage for retrieval and processing by the CPU.

Abstract: In a paged, virtual memory computer system, apparatus is provided for enabling I/O adapters to use virtual addresses. After each I/O data transfer, the main memory address involved in the transfer is incremented. This address is maintained in an I/O register associated with the I/O adapter performing the transfer. If a page boundary is crossed in the process of incrementing, the channel forms an I/O event indicating the page crossing and calling for translation of the incremented address. When the I/O adapter involved in the page crossing attempts a further data transfer, the channel disconnects the I/O adapter. The channel holds the I/O adapter disconnected until the page crossing denoted by the I/O event has been resolved by translating the incremented address and providing a new main memory address for continuing the data transfer.

Abstract: In a computer system having: an addressable storage for storing instructions, data and input-output (I/O) commands; a central processing unit (CPU) which fetches and executes instructions; and channel means connecting I/O adapters to the storage and the CPU, an apparatus transfers I/O commands to the I/O adapters whereby the I/O command is either accepted immediately or is queued by the I/O adapter. A queued command is taken up by the I/O adapter when no other data transfer operation is pending. To take up a queued command, the I/O adapter initiates a fetch of the pending command by invoking a standard data-transfer-from-storage sequence. The channel means responds to the fetch initiated by the I/O adapter to send the pending command to the I/O adapter.