Abstract: Before spin-on-glass (SOG) is applied and soft-cured over metal traces (10) having a height/width aspect ratio (of the spaces) of at least 1, the aluminum metal traces are selectively coated with selective tungsten (16). After SOG (18) is spun on and soft-cured, it is etched back to expose the metal interconnects. A selective tungsten wet etch in H.sub.2 O.sub.2 detaches the SOG from the metal walls, leaving silt-like voids (20). Stress-free SOG hard curing may now proceed. A capping layer (22) of SOG may now be applied, soft-cured, then hard-cured. Alternatively, other dielectric materials may be applied as the capping layer. Further, interfacial lateral sidewall voids (24) may be deliberately left unfilled, by employing a capping layer (24') of vapor-deposited oxide. The unfilled voids have a dielectric constant of 1.0, which is useful in extremely high speed devices.

Abstract: A high degree of wafer-scale integration of normally incompatible IC devices is achieved by providing a plurality of segments (10), each segment having thereon one or more circuits, circuit elements, sensors and/or I/O connections (14'). Each segment is provided with at least one edge (12) having an abutting portion (12a) capable of abutting against a similar edge of a neighboring segment. The segments are placed on the surface of a flotation liquid (20) and are allowed to be pulled together so as to mate abutting edges of neighboring segments, thereby forming superchips (10'). Microbridges (22) are formed between neighboring segments, such as by solidifying the flotation liquid, and interconnections (26) are formed between neighboring segments.

Abstract: A high degree of wafer-scale integration of normally incompatible IC devices is achieved by providing a plurality of segments (10), each segment having thereon one or more circuits, circuit elements, sensors and/or I/O connections (14'). Each segment is provided with at least one edge (12) having an abutting portion (12a) capable of abutting against a similar edge of a neighboring segment. The segments are placed on the surface of a flotation liquid (20) and are allowed to be pulled together so as to mate abutting edges of neighboring segments, thereby forming superchips (10'). Microbridges (22) are formed between neighboring segments, such as by solidifying the flotation liquid, and interconnections (26) are formed between neighboring segments.

Abstract: A method for producing microinterconnections including the steps of providing a first support member bearing electrical circuit elements including first electrical contacts and first electrical traces, providing a second support member bearing electrical circuit elements including second electrical contacts and second electrical traces, placing the second support member in face-to-face spaced and aligned relationship with respect to the first support member, and applying energy to the first support member for moving portions thereof underlying ones of the first contacts toward and into intimacy with aligned ones of the second contacts.

Abstract: Thermal dissipation problems characteristic of micropackaging applications in integrated circuits can be eliminated by the use of a semiconductor heat pipe package. Additionally, the heat pipe package as herein disclosed can be employed for the creation of substantially constant temperature surfaces. In applications where a device requires controlled temperatures in order to achieve optimum operation, such as in photo voltaic converters, the packaging of the present invention provides a means for such temperature control. The heat pipe package comprises, in its simplest form, a closed vessel or box containing a heat transferring fluid. In its liquid state, the heat transferring fluid is transported along the interior surfaces of the box by means of a plurality of microgrooves through capillary action. The interior cavity of the heat pipe package or box provides a means for transport of the heat transferring fluid in the vapor state.