Abstract: Pre-connected analyte sensors are provided. A pre-connected analyte sensor includes a sensor carrier attached to an analyte sensor. The sensor carrier includes a substrate configured for mechanical coupling of the sensor to testing, calibration, or wearable equipment. The sensor carrier also includes conductive contacts for electrically coupling sensor electrodes to the testing, calibration, or wearable equipment.

Abstract: A device includes: a first portion configured to be grasped by the hand of the user, and a second portion defining a reservoir containing a control material, wherein the control material contains a target analyte in a known or predetermined concentration. A method of verifying the accuracy of an analyte monitoring device includes receiving a fluid sample, identifying the fluid sample as a control solution, and analyzing the fluid sample.

Abstract: A thermally reflective membrane apparatus comprises a housing structure, and a thermally reflective membrane contained within the housing structure. The thermally reflective membrane comprises a semipermeable structure, and a porous, thermally reflective structure physically contacting the semipermeable structure. The porous, thermally reflective structure comprises discrete thermally reflective particles, and a binder material coupling the discrete thermally reflective particles to one another and the semipermeable structure. A fluid treatment system and method of treating a fluid are also described.

Abstract: A system includes: a cart including: four legs; at least one shelf, each shelf attached to each of the legs; the cart having a generally rectangular shape, a width of the cart being longer than a length of the robot, a length of the cart being longer than a length of the robot; four wheels, each wheel attached to a different leg at a bottom of the leg, the wheels configured to roll to facilitate movement of the cart; and a robotic dock, the robotic dock comprising four docking receptacles at ninety degree angles from adjacent docking receptacles; and a robot comprising: a sensor; and a docking module, the docking module comprising retractable docking pins, each retractable docking pin configured, when extended upward, to mate with a corresponding docking receptacle, thereby securing the robot to a bottom shelf of the cart.

Abstract: A cart-based workflow system includes: a robot operating in a facility; a server, the server operably connected to the robot, the server configured to do one or more of send the robot a cart transfer location usable for transferring the cart and instruct the robot to specify the cart transfer location; a graphic user interface (GUI) comprising a map of the facility, the GUI operably connected to the server, the GUI configured to do one or more of receive input from a human user and provide output to the human user, the GUI further configured to be usable by the user to coordinate movement of one or more of robots and carts.

Abstract: A cart-based workflow system includes: a robot operating in a facility; a server, the server operably connected to the robot, the server configured to do one or more of send the robot a cart transfer location usable for transferring the cart and instruct the robot to specify the cart transfer location; a graphic user interface (GUI) comprising a map of the facility, the GUI operably connected to the server, the GUI configured to do one or more of receive input from a human user and provide output to the human user, the GUI further configured to be usable by the user to coordinate movement of one or more of robots and carts.

Abstract: A system includes: a cart including: four legs; at least one shelf, each shelf attached to each of the legs; the cart having a generally rectangular shape, a width of the cart being longer than a length of the robot, a length of the cart being longer than a length of the robot; four wheels, each wheel attached to a different leg at a bottom of the leg, the wheels configured to roll to facilitate movement of the cart; and a robotic dock, the robotic dock comprising four docking receptacles at ninety degree angles from adjacent docking receptacles; and a robot comprising: a sensor; and a docking module, the docking module comprising retractable docking pins, each retractable docking pin configured, when extended upward, to mate with a corresponding docking receptacle, thereby securing the robot to a bottom shelf of the cart.

Abstract: A system includes: a cart including: four legs; at least one shelf, each shelf attached to each of the legs; the cart having a generally rectangular shape, a width of the cart being longer than a length of the robot, a length of the cart being longer than a length of the robot; four wheels, each wheel attached to a different leg at a bottom of the leg, the wheels configured to roll to facilitate movement of the cart; and a robotic dock, the robotic dock comprising four docking receptacles at ninety degree angles from adjacent docking receptacles; and a robot comprising: a sensor; and a docking module, the docking module comprising retractable docking pins, each retractable docking pin configured, when extended upward, to mate with a corresponding docking receptacle, thereby securing the robot to a bottom shelf of the cart.

Abstract: A robot management system includes: a server; a plurality of robots operably connected to the server over a network, at least one robot including a sensor; and a graphic user interface (GUI) operably connected to the server, the GUI configured to display a map of a facility comprising the plurality of robots, the map configured to receive from a user the user's instructions to manage the robot.

Abstract: A system includes: a cart including: four legs; at least one shelf, each shelf attached to each of the legs; the cart having a generally rectangular shape, a width of the cart being longer than a length of the robot, a length of the cart being longer than a length of the robot; four wheels, each wheel attached to a different leg at a bottom of the leg, the wheels configured to roll to facilitate movement of the cart; and a robotic dock, the robotic dock comprising four docking receptacles at ninety degree angles from adjacent docking receptacles; and a robot comprising: a sensor; and a docking module, the docking module comprising retractable docking pins, each retractable docking pin configured, when extended upward, to mate with a corresponding docking receptacle, thereby securing the robot to a bottom shelf of the cart.

Abstract: A data flow rate policer enforces data flow policies for a number of data flows using a probabilistic policy enforcement mechanism. The policer includes a memory that stores the state of each data flow in a compact data structure. Additionally, the policer includes one or more policing engines that implement the actual data flow policies based on information derived from the data structures. The policing engines may be implemented in hardware to increase performance.

Abstract: Techniques are described for monitoring performance of a network. Particularly, network devices within the network exchange routing communications in accordance with one or more routing protocols, such as the Border Gateway Protocol (BGP), to automatically establish a community for monitoring performance throughout the network. Upon establishing the community, the network devices of the community exchange performance probes to collect comprehensive performance information for the network. This performance information may be aggregated via one or more computing devices. Using the aggregated performance information, numerous network performance characteristics may be computed, including delay, jitter, throughput, availability and packet loss.

Abstract: A data flow rate policer enforces data flow policies for a number of data flows using a probabilistic policy enforcement mechanism. The policer includes a memory that stores the state of each data flow in a compact data structure. Additionally, the policer includes one or more policing engines that implement the actual data flow policies based on information derived from the data structures. The policing engines may be implemented in hardware to increase performance.

Abstract: A data flow rate policer enforces data flow policies for a number of data flows using a probabilistic policy enforcement mechanism. The policer includes a memory that stores the state of each data flow in a compact data structure. Additionally, the policer includes one or more policing engines that implement the actual data flow policies based on information derived from the data structures. The policing engines may be implemented in hardware to increase performance.

Abstract: Techniques are described for monitoring performance of a network. Particularly, network devices within the network exchange routing communications in accordance with one or more routing protocols, such as the Border Gateway Protocol (BGP), to automatically establish a community for monitoring performance throughout the network. Upon establishing the community, the network devices of the community exchange performance probes to collect comprehensive performance information for the network. This performance information may be aggregated via one or more computing devices. Using the aggregated performance information, numerous network performance characteristics may be computed, including delay, jitter, throughput, availability and packet loss.

Abstract: A data flow rate policer enforces data flow policies for a number of data flows using a probabilistic policy enforcement mechanism. The policer includes a memory that stores the state of each data flow in a compact data structure. Additionally, the policer includes one or more policing engines that implement the actual data flow policies based on information derived from the data structures. The policing engines may be implemented in hardware to increase performance.

Abstract: A high performance scaleable hardware architecture for a disk array storage subsystem which supports RAID modes 0, 3, 4 and 5. The architecture features a high bandwidth parity calculation engine, a buffered PCI interface operating at the full speed of the PCI bus, and a dedicated local memory. The dedicated local memory is dual ported so that PCI and parity operations may operate concurrently. The architecture of the disk array controller allows parity calculations and memory block moves to occur without interfering with the controller processor or its associated memory, freeing the controller processor to manage array task control. The array controller configuration allows simultaneous operation of data block moves between storage I/O devices and local memory; data block moves between host SCSI connections and local memory; parity calculations; and normal CPU memory fetches, queued operations for block moves and queued operations for parity tasks.

Abstract: A first inverter circuit is coupled between a first voltage source and a reference potential by a plurality of cascaded transistors. Each of the cascaded transistors has a control gate which may be selected to bring the resistance of the transistor into circuit with the inverter circuit to control the charging rate of a distributed capacitance. An output circuit coupled to the first inverter circuit provides the distributed capacitance and an inverted buffered output. The output circuit also includes an output which may be connected to another circuit of the present invention to form a cascaded delay circuit and to receive a reset signal for resetting the cascaded delay circuit.

Abstract: For LSI/VLSI integrated circuits which inherently have an address decoder and a data bus, a scan testing method and apparatus is presented which does not require additional pin connections to be dedicated for scan test implementation. Counter to the Joint Test Action Group approach, the present invention uses additional registers, multiplexers, and decoders in conjunction with the existing buses to provide test access to otherwise embedded layers of logic circuitry, without the addition of a single pin connection to a integrated circuit chip package. Further, since this test method and apparatus uses the data bus and registers just as the rest of the chip, slow and complex d.c. level shifting equipment is not required.

Abstract: A digitally controlled timing circuit for providing an output pulse signal precisely delayed with respect to an input signal irrespective of the time of occurrence of a system clock, but which uses the precision of the system clock to self-correct any inaccuracy in the delay includes a plurality of delay elements, the delay period of a respective one of which is adjustable, coupled between an input terminal, to which an input terminal is applied, and an output terminal, from which a delayed output signal is to be derived. Coupled to the input terminal and the plurality of delay elements is a toggled flip-flop which, with the delay elements, during a calibrate mode, forms an adjustable oscillator and generates a sequence of signals the lapse of time between successive ones of which is established by delays imparted by selected ones of the delay elements. The delays imparted by selected ones of the delay elements.