Abstract: A system for controlling power consumption in a microprocessor. The microprocessor fetches an instruction from memory. The instruction is decoded, producing an operation flow of at least one operation. Then, power micro-operations are introduced into the operation flow. These power micro-operations provide power consumption control functions for those functional units which are required to execute the various operations which have been decoded from the fetched instruction. The operations and power micro-operations are then scheduled for dispatch to the appropriate execution units. The scheduling is based on the availability of the appropriate execution units and the validity of operation data. The operations and power micro-operations are dispatched to the appropriate execution units, where the operations and power micro-operations are executed. The execution results are subsequently committed to the processor state in the original program order.