Patents by Inventor John Yong

John Yong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240109955
    Abstract: Disclosed are antigen binding polypeptides and antigen binding polypeptide complexes (e.g., antibodies and antigen binding fragments thereof) having certain structural and/or functional features. Also disclosed are polynucleotides and vectors encoding such polypeptides and polypeptide complexes; host cells, pharmaceutical compositions and kits containing such polypeptides and polypeptide complexes; and methods of using such polypeptides and polypeptide complexes.
    Type: Application
    Filed: June 30, 2023
    Publication date: April 4, 2024
    Inventors: Juan LI, Chi-Jen WEI, Ronnie R. WEI, Zhi-Yong YANG, John R. MASCOLA, Gary J. NABEL, John MISASI, Amarendra PEGU, Lingshu WANG, Tongqing ZHOU, Misook CHOE, Olamide K. OLONINIYI, Bingchun ZHAO, Yi ZHANG, Eun Sung YANG, Man CHEN, Kwanyee LEUNG, Wei SHI, Nancy J. SULLIVAN, Peter D. KWONG, Richard A. KOUP, Barney S. GRAHAM, Peng HE
  • Publication number: 20240070102
    Abstract: Described apparatuses and methods facilitate bus training with multiple dice, such as multiple memory dice. A controller can communicate with multiple dice to perform bus training by sending a test pattern and receiving in return a feedback pattern indicative of the bits detected by the dice. Because suitable signal timing can differ between dice, even those using the same bus, a controller may train each die separately from the others. In some situations, however, individualized training may be infeasible. To accommodate such situations, logic associated with two or more dice can combine, using at least one logical operation, bits as detected from the test pattern into a combined feedback pattern. A timing parameter that is jointly suitable for multiple dice can be determined, and the bus training may be concluded, responsive to the combined feedback pattern matching the test pattern. The multiple dice may be stacked or linked.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Yang Lu, Creston M. Dupree, Smruti Subhash Jhaveri, Hyun Yoo Lee, John Christopher Sancon, Kang-Yong Kim, Francesco Douglas Verna-Ketel
  • Publication number: 20240070101
    Abstract: Described apparatuses and methods facilitate bus training with multiple dice, such as multiple memory dice. A controller can communicate with multiple dice over a bus to perform bus training by sending a test pattern and receiving in return a feedback pattern indicative of the bits detected by the dice. Because suitable signal timing can differ between dice, even those using the same bus, the controller may attempt to train each die separately from the others. In some situations, however, individualized training may be infeasible. To accommodate such situations, logic associated with two or more dice can combine the bits as detected from the test pattern into a combined feedback pattern. A timing parameter that is jointly suitable for multiple dice can be determined, and the bus training may be concluded, responsive to the combined feedback pattern matching the test pattern. The multiple dice may be stacked or linked.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Francesco Douglas Verna-Ketel, Hyun Yoo Lee, Smruti Subhash Jhaveri, John Christopher Sancon, Yang Lu, Kang-Yong Kim
  • Publication number: 20240071461
    Abstract: Described apparatuses and methods relate to adaptive memory registers for a memory system that may support a nondeterministic protocol. To help manage power-delivery networks in a memory system, a device includes logic that can write values to memory registers associated with memory blocks of a memory array. The values indicate whether an associated memory block has been refreshed within a refresh interval. Other logic can read the registers to determine whether a block has been refreshed. The device also includes logic that can access data indicating a row address that was most recently, or is next to be, refreshed and write values representing the address to another register. The register can be read by other logic to determine whether a wordline potentially affected by an activation-based disturb event is near to being refreshed. These techniques can reduce the number of refresh operations performed, saving power and reducing costs.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Applicant: Micron Technology, Inc.
    Inventors: John Christopher Sancon, Kang-Yong Kim, Yang Lu, Hyun Yoo Lee
  • Publication number: 20240033594
    Abstract: Sunny's 3-in-1 putter attachment tool aims to relieve the frequent need to bend over and strain one's back, hips, or knees while tending to three frequent functions during golf, as well as reducing the need for multiple, separate tools. The multi-tool is designed for easy self-installation and enables the player to pick up golf balls, magnetized ball markers, as well as repair small divots and ball marks on the green, all without having to bend at the waist or knee.
    Type: Application
    Filed: August 1, 2022
    Publication date: February 1, 2024
    Inventor: JOHN YONG KI LEE
  • Patent number: 11674144
    Abstract: A method of controlling the number of cells in a population of cells having silenced transcription of a target nucleic acid as a function of time includes recruiting a chromatin regulator (CR) to a site proximal to a transcription initiation site of the target nucleic acid to form a fraction of silenced cells in the population of cells. The chromatin regulator may be EED, KRAB, DNMT3, HDAC4, EZH2, REST, or a combination thereof.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: June 13, 2023
    Assignee: California Institute of Technology
    Inventors: Michael Elowitz, Lacramioara Bintu, John Yong
  • Patent number: 10911048
    Abstract: A complementary metal-oxide semiconductor (CMOS) circuit comprises an inverter, a plurality of P-type metal-oxide semiconductor (PMOS) transistors, and a plurality of N-type metal-oxide semiconductor (NMOS) transistors. The inverter receives an input signal and drives one of the plurality of PMOS transistors or the plurality of NMOS transistors. The plurality of PMOS transistors generate a pull-up signal, change a beta ratio of the CMOS circuit, and change a first trip point of the CMOS circuit to a second trip point of the CMOS circuit based on the changed beta ratio. The plurality of NMOS transistors generate a pull-down signal, change the beta ratio, and change the second trip point of the CMOS circuit to a third trip point of the CMOS circuit based on the changed beta ratio.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: February 2, 2021
    Assignee: Nuvia Inc.
    Inventor: John Yong
  • Publication number: 20160304872
    Abstract: A method of controlling the number of cells in a population of cells having silenced transcription of a target nucleic acid as a function of time includes recruiting a chromatin regulator (CR) to a site proximal to a transcription initiation site of the target nucleic acid to form a fraction of silenced cells in the population of cells. The chromatin regulator may be EED, KRAB, DNMT3, HDAC4, EZH2, REST, or a combination thereof.
    Type: Application
    Filed: April 18, 2016
    Publication date: October 20, 2016
    Inventors: Michael Elowitz, Lacramioara Bintu, John Yong
  • Patent number: 9174268
    Abstract: An apparatus for forming an article by forging. The apparatus has at least one die having a die cavity to receive material, said material being at least partially molten, and at least one punch to slidably engage the die cavity and to exert a forming pressure on material disposed in the cavity. There is also at least one pin for forming an article feature. The pin is to slidably engage the die and to contact the material, the pin being further to recede upon exertion of the forming pressure and to exert a feature forming pressure when receded and thereby form the article having the article feature when the material solidifies under the forming pressure.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: November 3, 2015
    Assignee: Agency for Science, Technology and Research
    Inventors: Ming Shyan John Yong, Kin Kong Tong, Meng Kwong Ho, Siew Fei Pook
  • Publication number: 20150052963
    Abstract: An apparatus (10) for forming an article by forging. The apparatus comprises at least one die (12) having a die cavity (14) to receive material, said material (16) being at least partially molten, and at least one punch (20) adapted to slidably engage the die cavity and to exert a forming pressure on material disposed in the cavity. There is also at least one pin (24) for forming an article feature. The pin is adapted to slidably engage the die and to contact the material, the pin being further adapted to recede upon exertion of the forming pressure and to exert a feature forming pressure when receded and thereby form the article (30) having the article feature when the material solidifies under the forming pressure.
    Type: Application
    Filed: October 29, 2014
    Publication date: February 26, 2015
    Applicant: Agency for Science, Technology and Research
    Inventors: Ming Shyan John YONG, Kin Kong Tong, Meng Kwong Ho, Siew Fei Pook
  • Publication number: 20110146364
    Abstract: An apparatus (10) for forming an article by forging. The apparatus comprises at least one die (12) having a die cavity (14) to receive material, said material (16) being at least partially molten, and at least one punch (20) adapted to slidably engage the die cavity and to exert a forming pressure on material disposed in the cavity. There is also at least one pin (24) for forming an article feature. The pin is adapted to slidably engage the die and to contact the material, the pin being further adapted to recede upon exertion of the forming pressure and to exert a feature forming pressure when receded and thereby form the article (30) having the article feature when the material solidifies under the forming pressure.
    Type: Application
    Filed: June 20, 2005
    Publication date: June 23, 2011
    Applicant: Agency for Science, Technology and Research
    Inventors: Ming Shyan John Yong, Kin Kong Tong, Meng Kwong Ho, Siew Fei Pook
  • Publication number: 20070050602
    Abstract: In one embodiment, a renamer comprises a plurality of storage locations and compare circuitry. Each storage location is assigned to a respective renameable resource and is configured to store an identifier corresponding to a youngest instruction operation that writes the respective renameable resource. Coupled to receive an input representing one or more retiring instruction identifiers corresponding to instruction operations that are being retired, the compare circuitry is configured to detect a match between at least a first identifier in a first storage location and one of the retiring identifiers. An encoded form of the identifiers is logically divided into a plurality of fields, and the input comprises a first plurality of bit vectors. Each of the first plurality of bit vectors corresponds to a respective field and includes a bit position for each possible value of the respective field.
    Type: Application
    Filed: August 29, 2005
    Publication date: March 1, 2007
    Applicant: P.A. Semi, Inc.
    Inventors: Wei-Han Lien, John Yong, Shyam Sundar, Rajat Goel
  • Patent number: 6278308
    Abstract: A flip-flop circuit includes a differential stage coupled to a transparent latch. Respective sides of the differential stage, referred to as the “output side” and the “reference side,” are precharged high during a precharge phase. During an evaluation phase, the state of a data input signal is sensed. Depending upon the state of the data input signal, either the output side or the reference side is discharged. Also, during the evaluation phase, the transparent latch is enabled, and thereby samples and stores an output signal from the output side of the differential stage. Upon initiation of the next precharge phase, the transparent latch is quickly disabled (i.e., is placed in an opaque state), and retains its present state. Since only a single side of the differential stage is used to drive the transparent latch, the differential stage may advantageously be implemented in an asymmetric fashion.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: August 21, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Hamid Partovi, Michael Golden, John Yong
  • Patent number: 5760682
    Abstract: Wheel speed values for each of four wheels are collected and analyzed for a statistical variation which would indicate low tire pressure. Prior to analysis, and following reset of the system, calibration factors are determined for each of the wheels to compensate rolling radius variations, and subsequently used to correct all wheel speed values. The corrected speed values are then filtered to exclude values which represent wheel slippage, rough road fluctuations, vehicle cornering, and uphill or downhill travel. When a sufficient number of values have been collected, an F-value is calculated substantially according to the statistical method "analysis of the variance", and the F-value is compared to an empirically determined value corresponding to a predetermined pressure loss. This comparison can provide the basis for a driver warning. Since a larger F-value indicates a larger statistical difference in wheel speeds, the value can be rechecked after a further interval for additional pressure loss.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: June 2, 1998
    Assignee: Robert Bosch GmbH
    Inventors: John Yong Liu, Frank Sager