Patents by Inventor John Yong
John Yong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240033594Abstract: Sunny's 3-in-1 putter attachment tool aims to relieve the frequent need to bend over and strain one's back, hips, or knees while tending to three frequent functions during golf, as well as reducing the need for multiple, separate tools. The multi-tool is designed for easy self-installation and enables the player to pick up golf balls, magnetized ball markers, as well as repair small divots and ball marks on the green, all without having to bend at the waist or knee.Type: ApplicationFiled: August 1, 2022Publication date: February 1, 2024Inventor: JOHN YONG KI LEE
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Patent number: 11674144Abstract: A method of controlling the number of cells in a population of cells having silenced transcription of a target nucleic acid as a function of time includes recruiting a chromatin regulator (CR) to a site proximal to a transcription initiation site of the target nucleic acid to form a fraction of silenced cells in the population of cells. The chromatin regulator may be EED, KRAB, DNMT3, HDAC4, EZH2, REST, or a combination thereof.Type: GrantFiled: April 18, 2016Date of Patent: June 13, 2023Assignee: California Institute of TechnologyInventors: Michael Elowitz, Lacramioara Bintu, John Yong
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Patent number: 10911048Abstract: A complementary metal-oxide semiconductor (CMOS) circuit comprises an inverter, a plurality of P-type metal-oxide semiconductor (PMOS) transistors, and a plurality of N-type metal-oxide semiconductor (NMOS) transistors. The inverter receives an input signal and drives one of the plurality of PMOS transistors or the plurality of NMOS transistors. The plurality of PMOS transistors generate a pull-up signal, change a beta ratio of the CMOS circuit, and change a first trip point of the CMOS circuit to a second trip point of the CMOS circuit based on the changed beta ratio. The plurality of NMOS transistors generate a pull-down signal, change the beta ratio, and change the second trip point of the CMOS circuit to a third trip point of the CMOS circuit based on the changed beta ratio.Type: GrantFiled: May 5, 2020Date of Patent: February 2, 2021Assignee: Nuvia Inc.Inventor: John Yong
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Publication number: 20160304872Abstract: A method of controlling the number of cells in a population of cells having silenced transcription of a target nucleic acid as a function of time includes recruiting a chromatin regulator (CR) to a site proximal to a transcription initiation site of the target nucleic acid to form a fraction of silenced cells in the population of cells. The chromatin regulator may be EED, KRAB, DNMT3, HDAC4, EZH2, REST, or a combination thereof.Type: ApplicationFiled: April 18, 2016Publication date: October 20, 2016Inventors: Michael Elowitz, Lacramioara Bintu, John Yong
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Patent number: 9174268Abstract: An apparatus for forming an article by forging. The apparatus has at least one die having a die cavity to receive material, said material being at least partially molten, and at least one punch to slidably engage the die cavity and to exert a forming pressure on material disposed in the cavity. There is also at least one pin for forming an article feature. The pin is to slidably engage the die and to contact the material, the pin being further to recede upon exertion of the forming pressure and to exert a feature forming pressure when receded and thereby form the article having the article feature when the material solidifies under the forming pressure.Type: GrantFiled: June 20, 2005Date of Patent: November 3, 2015Assignee: Agency for Science, Technology and ResearchInventors: Ming Shyan John Yong, Kin Kong Tong, Meng Kwong Ho, Siew Fei Pook
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Publication number: 20150052963Abstract: An apparatus (10) for forming an article by forging. The apparatus comprises at least one die (12) having a die cavity (14) to receive material, said material (16) being at least partially molten, and at least one punch (20) adapted to slidably engage the die cavity and to exert a forming pressure on material disposed in the cavity. There is also at least one pin (24) for forming an article feature. The pin is adapted to slidably engage the die and to contact the material, the pin being further adapted to recede upon exertion of the forming pressure and to exert a feature forming pressure when receded and thereby form the article (30) having the article feature when the material solidifies under the forming pressure.Type: ApplicationFiled: October 29, 2014Publication date: February 26, 2015Applicant: Agency for Science, Technology and ResearchInventors: Ming Shyan John YONG, Kin Kong Tong, Meng Kwong Ho, Siew Fei Pook
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Publication number: 20110146364Abstract: An apparatus (10) for forming an article by forging. The apparatus comprises at least one die (12) having a die cavity (14) to receive material, said material (16) being at least partially molten, and at least one punch (20) adapted to slidably engage the die cavity and to exert a forming pressure on material disposed in the cavity. There is also at least one pin (24) for forming an article feature. The pin is adapted to slidably engage the die and to contact the material, the pin being further adapted to recede upon exertion of the forming pressure and to exert a feature forming pressure when receded and thereby form the article (30) having the article feature when the material solidifies under the forming pressure.Type: ApplicationFiled: June 20, 2005Publication date: June 23, 2011Applicant: Agency for Science, Technology and ResearchInventors: Ming Shyan John Yong, Kin Kong Tong, Meng Kwong Ho, Siew Fei Pook
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Publication number: 20070050602Abstract: In one embodiment, a renamer comprises a plurality of storage locations and compare circuitry. Each storage location is assigned to a respective renameable resource and is configured to store an identifier corresponding to a youngest instruction operation that writes the respective renameable resource. Coupled to receive an input representing one or more retiring instruction identifiers corresponding to instruction operations that are being retired, the compare circuitry is configured to detect a match between at least a first identifier in a first storage location and one of the retiring identifiers. An encoded form of the identifiers is logically divided into a plurality of fields, and the input comprises a first plurality of bit vectors. Each of the first plurality of bit vectors corresponds to a respective field and includes a bit position for each possible value of the respective field.Type: ApplicationFiled: August 29, 2005Publication date: March 1, 2007Applicant: P.A. Semi, Inc.Inventors: Wei-Han Lien, John Yong, Shyam Sundar, Rajat Goel
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Patent number: 6278308Abstract: A flip-flop circuit includes a differential stage coupled to a transparent latch. Respective sides of the differential stage, referred to as the “output side” and the “reference side,” are precharged high during a precharge phase. During an evaluation phase, the state of a data input signal is sensed. Depending upon the state of the data input signal, either the output side or the reference side is discharged. Also, during the evaluation phase, the transparent latch is enabled, and thereby samples and stores an output signal from the output side of the differential stage. Upon initiation of the next precharge phase, the transparent latch is quickly disabled (i.e., is placed in an opaque state), and retains its present state. Since only a single side of the differential stage is used to drive the transparent latch, the differential stage may advantageously be implemented in an asymmetric fashion.Type: GrantFiled: October 8, 1999Date of Patent: August 21, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Hamid Partovi, Michael Golden, John Yong
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Patent number: 5760682Abstract: Wheel speed values for each of four wheels are collected and analyzed for a statistical variation which would indicate low tire pressure. Prior to analysis, and following reset of the system, calibration factors are determined for each of the wheels to compensate rolling radius variations, and subsequently used to correct all wheel speed values. The corrected speed values are then filtered to exclude values which represent wheel slippage, rough road fluctuations, vehicle cornering, and uphill or downhill travel. When a sufficient number of values have been collected, an F-value is calculated substantially according to the statistical method "analysis of the variance", and the F-value is compared to an empirically determined value corresponding to a predetermined pressure loss. This comparison can provide the basis for a driver warning. Since a larger F-value indicates a larger statistical difference in wheel speeds, the value can be rechecked after a further interval for additional pressure loss.Type: GrantFiled: March 7, 1997Date of Patent: June 2, 1998Assignee: Robert Bosch GmbHInventors: John Yong Liu, Frank Sager