Abstract: A three step planarization method for planarizing aluminum or aluminum alloy in via and trench features of a wafer includes first, high rate deposition in the absence of heat, followed by low rate deposition in the presence of heat, and finally, high rate deposition with continued supply of heat to the wafer. Bias may be used. Deposition is preferably continuous and uninterrupted from the beginning of the first step until the end of the third step. The first step is limited in duration in order to produce a relatively thin layer which geometrically covers the inside surfaces of the feature. The duration of the second step is selectable, but is preferably based upon the temperature of the heat applied to the wafer and a characteristic size of the feature. The third step deposition completes the thickness of the film.

Abstract: Disclosed is a method of fabricating an integrated circuit. A substrate comprising a semiconductor material and having a first surface is provided. A first layer of metalization interconnects is formed on the first surface. A first thin film layer comprising a dielectric barrier material is deposited over the first layer of metalization interconnects. A second thin film layer comprising a dielectric passivating material is deposited over the first thin film layer of dielectric barrier material. A via having a width greater than the width of a metalization interconnect is then plasma etched in the dielectric passivating material using a first etch gas. The dielectric barrier material is then plasma etched using a second etch gas to remove the dielectric barrier material in the area of the via. A second layer of metalization interconnects is then formed, a metalization interconnect in each of the first and second layers of metalization interconnects being connected in the via.

Abstract: An integrated circuit comprising a substrate. The substrate comprises a semiconductor material and has a first surface. The circuit further comprises a layer of metalization interconnects over the first surface, each interconnect having a width. A first thin film layer comprising a dielectric barrier material is deposited directly onto the first layer of metalization interconnects. A second thin film layer comprising a dielectric passivating material is deposited directly onto the first thin layer of dielectric barrier material. A via is formed in the two thin film layers over a first metalization interconnect protruding into the via. The first metalization interconnect has a width less than the width of the via. A second metallization interconnect is connected to the first metalization interconnect in the via.

Abstract: A capacitive acoustic transducer comprises a first field plate mounted to a semiconductor substrate structure, a second metal field plate having first and second oppositely and substantially exposed surfaces, and a mounting arrangement for mounting the second field plate to the semiconductor substrate structure so that the first and second field plates form an acoustically responsive capacitor, the first exposed surface of the second field plate substantially facing the first field plate, the mounting arrangement allowing the second field plate to respond to acoustic energy for altering the capacitance between the first and second field plates, the mounting arrangement including first and second contacts for respective connection to the first and second field plates.

Abstract: Disclosed is a bimetal layer located between two portions of an integrated circuit, the bimetal layer comprising a layer of TiWN and a layer of TiN.

Abstract: The present invention comprises a method of forming a thin film dielectric layer on a substrate. The method comprises providing a sputtering chamber having a dielectric target disposed on a target electrode. A substrate to be covered with a thin film dielectric layer is introduced into the sputtering chamber and the substrate is located on a substrate holder electrode spaced from the target electrode. The chamber is then evacuated, and a sputtering atmosphere comprising an inert gas and a gas containing an element of a gettering material is introduced into the chamber. The gas containing an element of a gettering material is transferred into the chamber through a metering valve from a container outside the chamber. An RF potential is applied across the target electrode and the substrate electrode to establish a glow discharge in the region between the electrodes. Finally, a thin film dielectric layer doped with a gettering material is formed by a chemical reaction in the chamber.

Abstract: A capacitive acoustic transducer comprises a first field plate mounted to a semiconductor substrate structure, a second metal field plate having first and second oppositely and substantially exposed surfaces, and a mounting arrangement for mounting the second field plate to the semiconductor substrate structure so that the first and second field plates form an acoustically responsive capacitor, the first exposed surface of the second field plate substantially facing the first field plate, the mounting arrangement allowing the second field plate to respond to acoustic energy for altering the capacitance between the first and second field plates, the mounting arrangement including first and second contacts for respective connection to the first and second field plates.