Patents by Inventor Jon D. Maimon

Jon D. Maimon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for manufacturing sidewall contacts for a chalcogenide memory device
    Patent number: 6909107
    Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: June 21, 2005
    Assignee: BAE Systems, Information and Electronic Systems Integration, Inc.
    Inventors: John C. Rodgers, Jon D. Maimon
  • Method for manufacturing sidewall contacts for a chalcogenide memory device
    Patent number: 6815266
    Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: November 9, 2004
    Assignees: BAE Systems Information and Electronic Systems Integration, Inc., Ovonyx, Inc.
    Inventors: John C. Rodgers, Jon D. Maimon
  • Method for manufacturing sidewall contacts for a chalcogenide memory device
    Publication number: 20040197976
    Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.
    Type: Application
    Filed: April 26, 2004
    Publication date: October 7, 2004
    Inventors: John C. Rodgers, Jon D. Maimon
  • METHOD FOR MANUFACTURING SIDEWALL CONTACTS FOR A CHALCOGENIDE MEMORY DEVICE
    Publication number: 20040126925
    Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 1, 2004
    Inventors: John C. Rodgers, Jon D. Maimon
  • Method for manufacturing sidewall contacts for a chalcogenide memory device
    Patent number: 6750085
    Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: June 15, 2004
    Inventors: John C. Rodgers, Jon D. Maimon