Abstract: The technology disclosed herein provides a memory blade including a plurality of fabric switches configured to receive commands from a plurality of host clients, an address decoder and tracker circuit communicatively connected to the fabric switches and configured to determine the source of commands received at the fabric switches an aggregator crossbar configured to provide bandwidth aggregation between host clients and a plurality of memory modules; and a buffer module configured to couple the commands from the plurality of host clients with the plurality of memory modules.

Abstract: A data storage system for use in a high radiation environment runs first and second operating time counters to monitor a field-programmable, gate array (FPGA) configured as a storage controller. Based on the first operating time counter passing a first threshold, the FPGA is fully reprogrammed. Based on the second operating time counter passing a second threshold less than the first threshold, the FPGA is partially reprogrammed.

Abstract: A data storage chassis includes a plurality of data storage cartridges, and printed circuit board assembly (PCBA) electronics selectively connectable to one or more of the plurality of data storage cartridges. The data storage chassis also includes a wireless interface controller communicatively coupled to the PCBA electronics. The wireless interface controller facilitates wireless communication of data between the data storage chassis and a host using at least one frequency in a range of frequencies including fifth-generation (5G), millimeter, and sub-millimeter frequency ranges.

Abstract: A non-volatile memory (NVM) is formed of memory cells each having multiple ferroelectric memory elements (FMEs). Each FME stores data in relation to an electrical polarity of a recording layer formed of ferroelectric or anti-ferroelectric material. Each multi-FME memory cell is coupled to a set of external control lines activated by a control circuit in a selected order to perform program and/or read operations upon the FMEs. The FMEs may share a nominally identical construction or may have different constructions. Data are programmed and written responsive to the respective program/read responses of the FMEs. Constructions can include ferroelectric tunneling junctions (FTJs), ferroelectric random access memory (FeRAM), and ferroelectric field effect transistors (FeFETs). The NVM may form a portion of a data storage device, such as a solid-state drive (SSD).

Abstract: A data storage system for use in a high radiation environment includes an array of storage drives. Each storage drive includes a non-radiation-hardened drive controller, a non-radiation-hardened, non-volatile, storage medium, and a non-radiation-hardened volatile memory. The system includes a radiation-hardened storage controller coupled to the array. The radiation-hardened storage controller provides failure-resistant data redundancy among the storage drives of the array and provides host access to the array.

Abstract: A data storage apparatus is presented that includes a well structure comprising a suspension medium, and a magnetic particle disposed in at least a portion of the well structure. A control system is configured to represent a data state corresponding to a positioning of the magnetic particle within the well structure, the magnetic particle moved responsive to an applied field and a present material state of the well structure. Various addressable arrays of well structures and associated control elements can be established to form data storage devices.

Abstract: Apparatus and method for managing data in a processing system, such as but not limited to a data storage device such as a solid-state drive (SSD). A ferroelectric stack register memory has a first arrangement of ferroelectric memory cells (FMEs) of a first construction and a second arrangement of FMEs of a different, second construction arranged to provide respective cache lines for use by a controller, such as a programmable processor. A pointer mechanism is configured to provide pointers to point to each of the respective cache lines based on a time sequence of operation of the processor. Data sets can be migrated to the different arrangements by the controller as required based on the different operational characteristics of the respective FME constructions. The FMEs may be non-volatile and read-destructive. Refresh circuitry can be selectively enacted under different operational modes.

Abstract: A system for use in an aerospace environment includes an array of storage drives each comprising a non-radiation-hardened drive controller, a non-radiation-hardened, non-volatile, storage medium, and a non-radiation-hardened volatile memory. The system includes a radiation-tolerant storage controller coupled to the array. The storage controller provides failure-resistant data redundancy among the storage drives of the array. The system includes a bus host that accesses the array via the storage controller. The storage controller implements security logic and a root-of-trust that provides to the bus host verification of authenticity of the radiation tolerant storage controller and the storage drives.

Abstract: Method and apparatus for managing a front-end cache formed of ferroelectric memory element (FME) cells. Prior to storage of writeback data associated with a pending write command from a client device, an intelligent cache manager circuit forwards a first status value indicative that sufficient capacity is available in the front-end cache for the writeback data. Non-requested speculative readback data previously transferred to the front-end cache from the main NVM memory store may be jettisoned to accommodate the writeback data. A second status value may be supplied to the client device if insufficient capacity is available to store the writeback data in the front-end cache, and a different, non-FME based cache may be used in such case. Mode select inputs can be supplied by the client device specify a particular quality of service level for the front-end cache, enabling selection of suitable writeback and speculative readback data processing strategies.

Abstract: A memory device formed of ferroelectric field effect transistors (FeFETs). The memory device can be used as a front end buffer, such as in a data storage device having a non-volatile memory (NVM). A controller can be configured to transfer user data between the NVM and an external client (host) via the buffer. The FeFETs can be arranged in a two-dimensional (2D) or a three-dimensional (3D) array. A monitor circuit can be used to monitor operation of the FeFETs. An optimization controller can be used to adjust at least one operational parameter associated with the FeFETs responsive to the monitored operation by the monitor circuit. The FeFETs may require a refresh operation after each read operation. A power down sequence can involve a read operation without a subsequent refresh operation to wipe the FeFETs, the read operation jettisoning the data read from the buffer memory.

Abstract: A data storage system can employ a read destructive memory configured to fill a first cache with a first data set from a data repository prior to populating a second cache with a second data set describing the first data set with the first and second cache each having non-volatile ferroelectric memory cells. An entirety of the first cache may be read in response to a cache hit in the second cache with the cache hit responsive to a data read command from a host and with the first cache being read without a refresh operation restoring the data of the first cache.

Abstract: A data storage system can employ a read destructive memory configured with multiple levels. A non-volatile memory unit can be programmed with a first logical state in response to a first write voltage of a first hysteresis loop by a write controller prior to being programmed to a second logical state in response to a second write voltage of the first hysteresis loop, as directed by the write controller. The first and second logical states may be present concurrently in the non-volatile memory unit and subsequently read concurrently as the first logical state and the second logical state.

Abstract: A data storage apparatus includes a disk storage region in which magnetic disks are stored. A carrier mechanism picks up one or more of the magnetic disks and moves them to and from the disk storage region. A data access device of the apparatus includes a structure to receive the one or more magnetic disks from the carrier mechanism and spins the magnetic disks in place. One or more actuator arms are operable to move across a same surface of the one or more magnetic disks. Two or more read transducers are mounted to the actuator arms and operable to simultaneously read from the same surface of the one or more magnetic disks. Two or more write transducers are mounted to the actuator arms and operable to simultaneously write to the same surface of the one or more magnetic disks.

Abstract: Method and apparatus for managing a front-end cache formed of ferroelectric memory element (FME) cells. Prior to storage of writeback data associated with a pending write command from a client device, an intelligent cache manager circuit forwards a first status value indicative that sufficient capacity is available in the front-end cache for the writeback data. Non-requested speculative readback data previously transferred to the front-end cache from the main NVM memory store may be jettisoned to accommodate the writeback data. A second status value may be supplied to the client device if insufficient capacity is available to store the writeback data in the front-end cache, and a different, non-FME based cache may be used in such case. Mode select inputs can be supplied by the client device specify a particular quality of service level for the front-end cache, enabling selection of suitable writeback and speculative readback data processing strategies.

Abstract: A data storage system for use in a high radiation environment includes an array of storage drives. Each storage drive includes a non-radiation-hardened drive controller, a non-radiation-hardened, non-volatile, storage medium, and a non-radiation-hardened volatile memory. The system includes a radiation-hardened storage controller coupled to the array. The radiation-hardened storage controller provides failure-resistant data redundancy among the storage drives of the array and provides host access to the array.

Abstract: An apparatus may include a memory device, a memory controller, or both that can communicate via memory standard interfaces. However, the memory device may have physical memory that does not comply with the memory standard by itself. Disclosed herein are solutions that allow various non-standard types of memory, or emerging memory, to be utilized via a host, microprocessor, or memory controller that implements the interface standard. For example, by utilizing a command converter at the microprocessor and a tunneling register at the memory device, a microprocessor can send commands to the memory device by writing them to the tunneling register, which can then be processed at the memory device for operations to be performed with the non-standard or emerging memory.

Abstract: The described technology provides implementations of a mechanical magnetoresistance device. The mechanical magnetoresistance device includes a first magnetoresistive well, the magnetoresistive well including at least one magnetic element and a suspension substrate, wherein the at least one magnetic element is suspended in the suspension substrate. The mechanical magnetoresistance device further includes a first conductive element in electronic communication with a first portion of the first magnetoresistive well, a second conductive element in electronic communication with a different second portion of the first magnetoresistive well, wherein the first conductive element is in electronic communication with the second conductive element via the first magnetoresistive well.

Abstract: Features are detected from a sensor signal via a deep-learning network or other feature engineering methods in an edge processing node. Machine-learned metadata is created that describes the features, and a hash is created with the machine-learned metadata. The sensor signal is stored as a content object at the edge processing node, the object being keyed with the hash at, the edge processing node.

Abstract: A data storage system can employ a read destructive memory configured with multiple levels. A non-volatile memory unit can be programmed with a first logical state in response to a first write voltage of a first hysteresis loop by a write controller prior to being programmed to a second logical state in response to a second write voltage of the first hysteresis loop, as directed by the write controller. The first and second logical states may be present concurrently in the non-volatile memory unit and subsequently read concurrently as the first logical state and the second logical state.

Abstract: A data storage system can utilize one or more data storage devices that employ a solid-state non-volatile read destructive memory consisting of ferroelectric memory cells. A leveling strategy can be generated by a wear module connected to the memory with the leveling strategy prescribing a plurality of memory cell operating parameters associated with different amounts of cell wear. The wear module may monitor activity of a memory cell and detect an amount of wear in the memory cell as a result of the monitored activity, which can prompt changing a default set of operating parameters for the memory cell to a first stage of operating parameters, as prescribed by the leveling strategy, in response to the detected amount of wear.