Abstract: Systems and methods are disclosed for probabilistic aging command sorting, including adjusting an execution order for a command based on a probability of the command reaching a time out threshold. Various example embodiments are directed to selecting a command for execution from a queue of commands awaiting execution, in which the commands have non-uniform attributes influencing their selection and a time limit within which to execute them. In some embodiments, an apparatus may comprise a circuit configured to calculate a first estimated access time to execute a selected command from a command queue, modify the first estimated access time based on a probability of the selected command reaching a time-out age threshold to determine a time out-adjusted access time, and execute the selected command in an order based on the time out-adjusted access time.

Abstract: The present disclosure provides a data storage system including a data memory device and controller having interface error detection and handling logic. In one example, a solid-state data memory device is provided and includes a semiconductor package. A memory array is provided in the semiconductor package and an interface is provided that is communicatively couplable to a device bus for receiving data to be stored to the memory array. An error detection component is provided in the semiconductor package and is associated with the interface of the solid-state data memory device. The error detection component is configured to detect errors occurring on data received at the interface prior to the data being stored to the memory array.

Abstract: Random numbers are generated using entropic properties associated with circuit hardware. Consistent with one method, a switching voltage regulator circuit is used to generate a random number. Data that is responsive to switching states of the switching voltage regulator circuit is generated. A multi-bit random number is then generated from the generated data.

Abstract: Random numbers are generated using entropic properties associated with circuit hardware. Consistent with one method, a switching voltage regulator circuit is used to generate a random number. Data that is responsive to switching states of the switching voltage regulator circuit is generated. A multi-bit random number is then generated from the generated data.

Abstract: Methods and apparatuses for detecting mode hopping in a laser diode or other optical energy source in heat-assisted magnetic recording. An output power of the laser diode or other optical energy source is measured and the output power is differentiated over time to determine a rate of change. If it is determined that the rate of change exceeds a threshold value, a fault signal is asserted indicating a potential mode hopping event.

Abstract: A circuit may be configured to precompensate the storage of data on a storage device. The magnitude and polarity of the precompensated time adjustment can be determined by looking up data patterns of storage regions in a table. A boundary can include storage regions of the device used to determine the precompensation.

Abstract: Methods and apparatuses for detecting mode hopping in a laser diode or other optical energy source in heat-assisted magnetic recording. An output power of the laser diode or other optical energy source is measured and the output power is differentiated over time to determine a rate of change. If it is determined that the rate of change exceeds a threshold value, a fault signal is asserted indicating a potential mode hopping event.

Abstract: Methods, apparatuses, and systems for allowing a single-die preamp to act as two or more virtual preamps for reading or writing data through multiple heads or elements concurrently. A selection register of a preamplifier is set to enable access to a primary register map. Values of registers in the primary register map are set to program a primary preamp channel for performing read or write operations to a first head. The selection register is then set to enable access to a secondary register map, and values of registers in the secondary register map are set to program a secondary preamp channel for performing read or write operations to a second head. Read or write operations can be performed to the first head through the primary preamp channel at a same time that read or write operations are performed to the second head through the second preamp channel.

Abstract: The present disclosure provides a data storage system including a data memory device and controller having interface error detection and handling logic. In one example, a solid-state data memory device is provided and includes a semiconductor package. A memory array is provided in the semiconductor package and an interface is provided that is communicatively couplable to a device bus for receiving data to be stored to the memory array. An error detection component is provided in the semiconductor package and is associated with the interface of the solid-state data memory device. The error detection component is configured to detect errors occurring on data received at the interface prior to the data being stored to the memory array.

Abstract: Apparatus and method for data integrity management in a data storage device. In accordance with some embodiments, a controller transfers user data blocks between a host device and a main memory. Each user data block has an associated logical address. A data integrity manager generates and stores a verification code for each user data block in a table structure in a local memory. The data integrity manager uses the verification code to independently verify a most current version of a selected user data block is being retrieved by the controller from the main memory during a host read request.

Abstract: Apparatus and method for detecting media defects using a multi-sensor transducer. In some embodiments, a first pattern is written to a first track on a rotatable storage media and a second pattern is written to a second track on the media. A first read sensor of a multi-sensor transducer senses the first pattern from the first track and a second read sensor of the multi-sensor transducer concurrently senses the second pattern from the second track. At least one storage media defect is detected responsive to the sensed first and second patterns.

Abstract: A data storage device has encrypted user data and a media key stored on media, and a root key stored in an electronic circuit. The data storage device has a first connector adapted to receive a user key and a hardware key device connected to a second connector adjacent an installation space. The hardware key device stores a destructible key in non-volatile memory. The hardware key device is mechanically destroyed, thereby rendering the encrypted user data non-decipherable after the destroying.

Abstract: Apparatus and method for data integrity management in a data storage device. In accordance with some embodiments, a controller transfers user data blocks between a host device and a main memory. Each user data block has an associated logical address. A data integrity manager generates and stores a verification code for each user data block in a table structure in a local memory. The data integrity manager uses the verification code to independently verify a most current version of a selected user data block is being retrieved by the controller from the main memory during a host read request.

Abstract: Apparatus and method for detecting media defects using a multi-sensor transducer. In some embodiments, a first pattern is written to a first track on a rotatable storage media and a second pattern is written to a second track on the media. A first read sensor of a multi-sensor transducer senses the first pattern from the first track and a second read sensor of the multi-sensor transducer concurrently senses the second pattern from the second track. At least one storage media defect is detected responsive to the sensed first and second patterns.

Abstract: In response to a hard disk drive losing primary power, power is obtained from a spinning motor of the hard disk drive. Portions of a controller of the hard disk drive are selectively depowered to facilitate performing safeguard operations via the controller using the power obtained from the spinning motor.

Abstract: Random numbers are generated using entropic properties associated with circuit hardware. Consistent with one method, a switching voltage regulator circuit is used to generate a random number. Data that is responsive to switching states of the switching voltage regulator circuit is generated. A multi-bit random number is then generated from the generated data.

Abstract: Apparatus and method for supplying electrical power to a device. A system on chip (SOC) integrated circuit includes a first region having a processing core and a second region characterized as an always on domain (AOD) power island electrically isolated from the first region and having a power control block. A first power supply module is used to apply power to the first region, and a second power supply module is used to apply power to the second region. The second power supply module includes a main switch between the first power supply module and a host input voltage terminal. The power control block initiates a low power mode by transitioning the main switch to an open state. This causes the first region to receive no electrical power while the second region continuously receives power during the low power mode.

Abstract: Power is routed from one or more power supplies. As consistent with one or more example embodiments, a data storage device senses and/or is informed of the availability and voltage level of one or more power supplies. Based upon the availability and voltage level of power supplies, circuits in the memory device are powered using one or more of the sensed power supplies. In some applications, the power is drawn in a manner that emulates the behavior of one or more circuits that are respectively powered.

Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a data-storage device is implemented having a memory control circuit controlling nonvolatile and volatile memory. An operating power circuit carries primary-operating power from the host-system to the memories and control circuitry. A backup power circuit includes energy-storage circuitry with one or more energy storage devices. An isolation-regulation circuit provides voltage regulation of power from the host-system and also isolates the host-system provided power from the energy storage devices. A regulation power circuit carries the regulated power from the isolation-regulation circuit to the energy storage devices.

Abstract: In one embodiment, a solid-state drive contains a plurality of data memory devices requiring elevated voltages for erasure and programming operations. A common voltage regulator, external to the data memory devices, provides the elevated voltage, thereby reducing the overall power consumption of the data storage device.