Abstract: A method and system for inserting in-place interconnect repeaters along the paths of interconnects of an integrated circuit is presented. The integrated circuit includes an interconnect layer on which an interconnect is routed, a silicon layer in which repeaters are implemented, and zero or more intervening layers. In accordance with the invention, reserved metal areas are defined on each intervening layer that resides between the interconnect layer and the repeater layer. Each interconnect net that requires a repeater for performance reasons is assigned to a repeater location. A repeater buffer is inserted at the assigned repeater locations. The interconnect net is cut into first and second subnets, which are then respectively connected through the reserved metal areas of the intervening layers to the respective input and output port of the repeater buffer.

Abstract: A method and system for determining locations of interconnect repeater farms in the physical design of an integrated circuit is presented. The optimal unconstrained repeater locations are calculated for a given routing list of interconnect nets. Repeater farms are defined in areas of concentration of the calculated optimal unconstrained repeater locations. The optimal constrained repeater locations are then calculated such that the repeater locations are constrained to the repeater farms. A set of sub-optimal interconnect nets which are hurt the most from the repeater farm constraint are selected. The optimal unconstrained repeater locations for the selected set of sub-optimal interconnect nets are then calculated and additional repeater farms are defined to encompass areas of concentration of the optimal repeater locations of the sub-optimal interconnect nets. The process is repeated until desired performance gain is achieved.