Patents by Inventor Jon Hacker

Jon Hacker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9741612
    Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for aligning an electronic feature to a through-substrate via includes forming a self-aligned alignment feature having a wall around at least a portion of the TSV and aligning a photolithography tool to the self-aligned alignment feature. In some embodiments, the self-aligned alignment feature is defined by the topography of a seed material at a backside of the device.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: August 22, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Brandon P. Wirz, Keith Ypma, Christopher J. Gambee, Jaspreet S. Gandhi, Kevin M. Dowdle, Irina Vasilyeva, Yang Chao, Jon Hacker
  • Publication number: 20160172242
    Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for aligning an electronic feature to a through-substrate via includes forming a self-aligned alignment feature having a wall around at least a portion of the TSV and aligning a photolithography tool to the self-aligned alignment feature. In some embodiments, the self-aligned alignment feature is defined by the topography of a seed material at a backside of the device.
    Type: Application
    Filed: February 23, 2016
    Publication date: June 16, 2016
    Inventors: Brandon P. Wirz, Keith Ypma, Christopher J. Gambee, Jaspreet S. Gandhi, Kevin M. Dowdle, Irina Vasilyeva, Yang Chao, Jon Hacker
  • Patent number: 9299663
    Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for aligning an electronic feature to a through-substrate via includes forming a self-aligned alignment feature having a wall around at least a portion of the TSV and aligning a photolithography tool to the self-aligned alignment feature. In some embodiments, the self-aligned alignment feature is defined by the topography of a seed material at a backside of the device.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: March 29, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Brandon P. Wirz, Keith Ypma, Christopher J. Gambee, Jaspreet S. Gandhi, Kevin M. Dowdle, Irina Vasilyeva, Yang Chao, Jon Hacker
  • Publication number: 20150333014
    Abstract: Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for aligning an electronic feature to a through-substrate via includes forming a self-aligned alignment feature having a wall around at least a portion of the TSV and aligning a photolithography tool to the self-aligned alignment feature. In some embodiments, the self-aligned alignment feature is defined by the topography of a seed material at a backside of the device.
    Type: Application
    Filed: May 19, 2014
    Publication date: November 19, 2015
    Applicant: Micron Technology, Inc.
    Inventors: Brandon P. Wirz, Keith Ypma, Christopher J. Gambee, Jaspreet S. Gandhi, Kevin M. Dowdle, Irina Vasilyeva, Yang Chao, Jon Hacker