Patents by Inventor Jon Lexau

Jon Lexau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9727606
    Abstract: Techniques are described for performing filter and project operations. In an embodiment, a set of predicates that specify criteria for filtering results to a query is received. Based on a particular predicate of the set of predicates, a predicate result for at least one portion of a particular column is generated. The predicate result identifies rows within the first column that satisfy the particular predicate. Rows are selected and returned as results to the query based at least in part on the predicate result. In an embodiment, the predicate result is a bitvector where each bit of the bitvector corresponds to a particular row within the particular column and identify whether the particular row satisfies the particular predicate.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: August 8, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Justin Schauer, Philip Amberg, Robert David Hopkins, II, Jon Lexau
  • Patent number: 9297971
    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and this top surface is in turn electrically coupled to a front surface of an input/output (I/O) integrated circuit that faces the top surface. Furthermore, the front surface of the I/O integrated circuit is electrically coupled to a top surface of the optical integrated circuit, where the top surface of the optical integrated circuit faces the front surface of the I/O integrated circuit.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: March 29, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Hiren D. Thacker, Ashok V. Krishnamoorthy, Robert David Hopkins, II, Jon Lexau, Xuezhe Zheng, Ronald Ho, Ivan Shubin, John E. Cunningham
  • Patent number: 9256026
    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each other on the same side of a substrate in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. In addition, an input/output (I/O) integrated circuit is coupled to the optical integrated circuit between the substrate and the optical integrated circuit. This I/O integrated circuit includes high-speed I/O circuits and energy-efficient driver and receiver circuits and communicates with optical devices on the optical integrated circuit. By integrating the optical integrated circuit, the integrated circuit and the I/O integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: February 9, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Hiren D. Thacker, Ashok V. Krishnamoorthy, Robert David Hopkins, II, Jon Lexau, Ronald Ho, John E. Cunningham
  • Patent number: 9250403
    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit by a top surface of the interposer, where the top surface faces the front surface of the integrated circuit and the front surface of the optical integrated circuit. Furthermore, the integrated circuit and the optical integrated circuit may be on a same side of the interposer. By integrating the optical integrated circuit and the integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: February 2, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Hiren D. Thacker, Frankie Y. Liu, Robert David Hopkins, II, Jon Lexau, Xuezhe Zheng, Guoliang Li, Ivan Shubin, Ronald Ho, John E. Cunningham, Ashok V. Krishnamoorthy
  • Publication number: 20150098677
    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each other on the same side of a substrate in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. In addition, an input/output (I/O) integrated circuit is coupled to the optical integrated circuit between the substrate and the optical integrated circuit. This I/O integrated circuit includes high-speed I/O circuits and energy-efficient driver and receiver circuits and communicates with optical devices on the optical integrated circuit. By integrating the optical integrated circuit, the integrated circuit and the I/O integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.
    Type: Application
    Filed: November 13, 2014
    Publication date: April 9, 2015
    Inventors: Hiren D. Thacker, Ashok V. Krishnamoorthy, Robert David Hopkins, II, Jon Lexau, Ronald Ho, John E. Cunningham
  • Patent number: 8971676
    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each other on the same side of a substrate in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. In addition, an input/output (I/O) integrated circuit is coupled to the optical integrated circuit between the substrate and the optical integrated circuit. This I/O integrated circuit includes high-speed I/O circuits and energy-efficient driver and receiver circuits and communicates with optical devices on the optical integrated circuit. By integrating the optical integrated circuit, the integrated circuit and the I/O integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: March 3, 2015
    Assignee: Oracle International Corporation
    Inventors: Hiren D. Thacker, Ashok V. Krishnamoorthy, Robert David Hopkins, II, Jon Lexau, Ronald Ho, John E. Cunningham
  • Publication number: 20140321803
    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit by a top surface of the interposer, where the top surface faces the front surface of the integrated circuit and the front surface of the optical integrated circuit. Furthermore, the integrated circuit and the optical integrated circuit may be on a same side of the interposer. By integrating the optical integrated circuit and the integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.
    Type: Application
    Filed: October 7, 2013
    Publication date: October 30, 2014
    Applicant: Oracle International Corporation
    Inventors: Hiren D. Thacker, Frankie Y. Liu, Robert David Hopkins, II, Jon Lexau, Xuezhe Zheng, Guoliang Li, Ivan Shubin, Ronald Ho, John E. Cunningham, Ashok V. Krishnamoorthy
  • Publication number: 20140321804
    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and this top surface is in turn electrically coupled to a front surface of an input/output (I/O) integrated circuit that faces the top surface. Furthermore, the front surface of the I/O integrated circuit is electrically coupled to a top surface of the optical integrated circuit, where the top surface of the optical integrated circuit faces the front surface of the I/O integrated circuit.
    Type: Application
    Filed: October 7, 2013
    Publication date: October 30, 2014
    Applicant: Oracle International Corporation
    Inventors: Hiren D. Thacker, Ashok V. Krishnamoorthy, Robert David Hopkins, II, Jon Lexau, Xuezhe Zheng, Ronald Ho, Ivan Shubin, John E. Cunningham
  • Publication number: 20140052743
    Abstract: Techniques are described for performing filter and project operations. In an embodiment, a set of predicates that specify criteria for filtering results to a query is received. Based on a particular predicate of the set of predicates, a predicate result for at least one portion of a particular column is generated. The predicate result identifies rows within the first column that satisfy the particular predicate. Rows are selected and returned as results to the query based at least in part on the predicate result. In an embodiment, the predicate result is a bitvector where each bit of the bitvector corresponds to a particular row within the particular column and identify whether the particular row satisfies the particular predicate.
    Type: Application
    Filed: August 20, 2012
    Publication date: February 20, 2014
    Inventors: Justin Schauer, Philip Amberg, Robert David Hopkins, II, Jon Lexau
  • Patent number: 6707317
    Abstract: One embodiment of the present invention provides a domino logic circuit that operates asynchronously. This domino logic circuit includes a number of stages, including a present stage that receives one or more inputs from a prior stage and generates one or more outputs for a next stage. It also includes a control circuit that ensures that the present stage enters a precharging state before entering a subsequent evaluation state in which one or more inputs of the present stage are used to generate one or more outputs.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: March 16, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Josephus C. Ebergen, Ivan E. Sutherland, Jon Lexau, Jonathan Gainsley
  • Publication number: 20030201796
    Abstract: One embodiment of the present invention provides a domino logic circuit that operates asynchronously. This domino logic circuit includes a number of stages, including a present stage that receives one or more inputs from a prior stage and generates one or more outputs for a next stage. It also includes a control circuit that ensures that the present stage enters a precharging state before entering a subsequent evaluation state in which one or more inputs of the present stage are used to generate one or more outputs.
    Type: Application
    Filed: April 29, 2002
    Publication date: October 30, 2003
    Inventors: Josephus C. Ebergen, Ivan E. Sutherland, Jon Lexau, Jonathan Gainsley
  • Patent number: 6085316
    Abstract: A layered counterflow pipeline structure is described in which sub-tasks performed at each stage in a counterflow pipeline processor are separated into different layers. As words flow through the counterflow pipeline processor, they are divided into partial words which are supplied to the different layers, GET, CHECK and PROCESS, for appropriate handling by that portion of each stage. In the GET layer, partial words passing through each stage are analyzed to determine whether they constitute an encounter pair. In the CHECK layer a determination is made as to whether the word selected by the GET layer requires further modification. Finally, in the PROCESS layer operations are performed on the words themselves based upon control messages from the other layers. The layers of the processor communicate with each other using suitable communication paths such as First In First Out registers.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: July 4, 2000
    Assignee: Sun Microsystems, Inc.
    Inventors: Ivan E. Sutherland, Charles E. Molnar, deceased, Ian W. Jones, William S. Coates, Jon Lexau