Patents by Inventor Jon M. Dhuse

Jon M. Dhuse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Imaging system having a sensor array reset noise reduction mechanism
    Patent number: 6438276
    Abstract: What is disclosed is an apparatus for reducing row reset noise in photodiode based complementary metal oxide (CMOS) sensors. The apparatus uses at least one reference pixel for each row of pixels in a sensor array. Also, a reset noise elimination unit is provided to adjust the values received from the pixels in a particular row by an adjustment value determined from the reset values received from the reference pixels. Additionally, a method of using the apparatus is disclosed. The method has a step of providing a first reset signal to a row of pixels including the reference pixels. The method also reads out a first set of values from this row after integration. The method continues with providing a second reset signal to the row and a second set of values is read from the row. An adjustment value is calculated from the difference of the values which are read out from the reference pixels.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: August 20, 2002
    Assignee: Intel Corporation
    Inventors: Jon M. Dhuse, Kevin M. Connolly, Mark A. Beiley
  • Stacked die integrated circuit device
    Patent number: 6229158
    Abstract: A compound die may be formed of two dies each having face and back sides, said dies being connected with said dies in face to face alignment. A radiation communication system may be used to assist in aligning the dies and in providing communications between the two dies. In this way, a composite structure may be produced which has advanced capabilities, a small footprint, and low impedance.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: May 8, 2001
    Assignee: Intel Corporation
    Inventors: Ronald K. Minemier, Jon M. Dhuse
  • Method and apparatus to reduce row reset noise in photodiode
    Patent number: 6133862
    Abstract: What is disclosed is an apparatus for reducing row reset noise in photodiode based complementary metal oxide (CMOS) sensors. The apparatus uses at least one reference pixel for each row of pixels in a sensor array. Also, a reset noise elimination unit is provided to adjust the values received from the pixels in a particular row by an adjustment value determined from the reset values received from the reference pixels. Additionally, a method of using the apparatus is disclosed. The method has a step of providing a first reset signal to a row of pixels including the reference pixels. The method also reads out a first set of values from this row after integration. The method continues with providing a second reset signal to the row and a second set of values is read from the row. An adjustment value is calculated from the difference of the values which are read out from the reference pixels.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: October 17, 2000
    Assignee: Intel Corporation
    Inventors: Jon M. Dhuse, Kevin M. Connolly, Mark A. Beiley
  • Stacked die integrated circuit device
    Patent number: 6093938
    Abstract: A compound die may be formed of two dies each having face and back sides, said dies being connected with said dies in face to face alignment. A radiation communication system may be used to assist in aligning the dies and in providing communications between the two dies. In this way, a composite structure may be produced which has advanced capabilities, a small footprint, and low impedance.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: July 25, 2000
    Assignee: Intel Corporation
    Inventors: Ronald K. Minemier, Jon M. Dhuse