Abstract: An HPA MMIC assembly includes a MMIC device coupled to a thermal spreader. A ground plane is provided on the thermal spreader and coupled to FETs in the MMIC device. The multiple levels of metal separated by multiple dielectric layers provide low-loss broad-band microstrip circuits. The thermal spreader may include diamond, an air/wire-edm spreader or a multi-layer board (MLB) with heat sink vias and ground vias.

Abstract: An HPA MMIC assembly includes a MMIC device coupled to a thermal spreader. A ground plane is provided on the thermal spreader and coupled to FETs in the MMIC device. The multiple levels of metal separated by multiple dielectric layers provide low-loss broad-band microstrip circuits. The thermal spreader may include diamond, an air/wire-edm spreader or a multi-layer board (MLB) with heat sink vias and ground vias.

Abstract: A circuit for amplifying a source signal generated by a signal source having a first impedance includes a transmission line transformer (TLT) having a first, a second, a third, and a fourth port wherein the TLT is coupled to receive the source signal at the first port and configured to output a corresponding impedance matched signal at the second port, the second port is coupled to the third port of the TLT, the circuit also including a TLT load having a first terminal coupled to the fourth port of the TLT and a second terminal coupled to a reference potential. The circuit additionally includes an amplifier device responsive to the impedance matched signal to generate an amplified signal.

Abstract: A circuit for amplifying a source signal generated by a signal source having a first impedance includes a transmission line transformer (TLT) having a first, a second, a third, and a fourth port wherein the TLT is coupled to receive the source signal at the first port and configured to output a corresponding impedance matched signal at the second port, the second port is coupled to the third port of the TLT, the circuit also including a TLT load having a first terminal coupled to the fourth port of the TLT and a second terminal coupled to a reference potential. The circuit additionally includes an amplifier device responsive to the impedance matched signal to generate an amplified signal.

Abstract: A temperature control system having: a resistor formed in a region of a semiconductor, such resistor having a pair of spaced electrodes in ohmic contact with the semiconductor; at least one device formed in another region of the semiconductor thermally proximate the resistor formed region, such device generating heat in the semiconductor; and circuitry, including a reference connected to one of the pair of electrodes, for operating the resistor in saturation and for sensing variation in the resistor in response to the heat generated by the device and for controlling the heat generated by the device in the semiconductor in response to the sensed variation.

Abstract: A temperature control system having: a resistor formed in a region of a semiconductor, such resistor having a pair of spaced electrodes in ohmic contact with the semiconductor; at least one device formed in another region of the semiconductor thermally proximate the resistor formed region, such device generating heat in the semiconductor; and circuitry, including a reference connected to one of the pair of electrodes, for operating the resistor in saturation and for sensing variation in the resistor in response to the heat generated by the device and for controlling the heat generated by the device in the semiconductor in response to the sensed variation.

Abstract: The present invention relates to microwave circuits, and more particularly to bypass circuits for bias connections. The bypass circuit comprises a capacitor in series with an inductor, the series combination being connected between the bias conductor and ground. This series combination provides low return loss at the operating frequency. A de-queueing circuit may be included in the bypass circuit to provide loss at other frequencies.

Abstract: The present invention relates to microwave circuits, and more particularly to bypass circuits for bias connections. The bypass circuit comprises a capacitor in series with an inductor, the series combination being connected between the bias conductor and ground. This series combination provides low return loss at the operating frequency. A de-queueing circuit may be included in the bypass circuit to provide loss at other frequencies.

Abstract: A power amplifier includes a transistor, a transmission line transformer, and a capacitor. The transistor is operable to receive a signal and to generate an amplified signal. The transistor has a source, a drain, and a gate. The gate has a first impedance and is operable to receive the signal to be amplified. The transmission line transformer has a first, second, third, and fourth port, the first port and the third port being coupled directly to the gate of the transistor, and the fourth port being coupled to a source device having a second impedance. The capacitor has a first end and a second end. The first end of the capacitor is coupled to the second port of the transmission line transformer and the second end is coupled to a ground.

Abstract: A power amplifier includes a transistor, a transmission line transformer, and a capacitor. The transistor is operable to receive a signal and to generate an amplified signal. The transistor has a source, a drain, and a gate. The gate has a first impedance and is operable to receive the signal to be amplified. The transmission line transformer has a first, second, third, and fourth port, the first port and the third port being coupled directly to the gate of the transistor, and the fourth port being coupled to a source device having a second impedance. The capacitor has a first end and a second end. The first end of the capacitor is coupled to the second port of the transmission line transformer and the second end is coupled to a ground.

Abstract: A power amplifier includes a transistor, a transmission line transformer, and a capacitor. The transistor is operable to receive a signal and to generate an amplified signal. The transistor has a source, a drain, and a gate. The gate has a first impedance and is operable to receive the signal to be amplified. The transmission line transformer has a first, second, third, and fourth port, the first port being coupled to the gate of the transistor and the third port, and the fourth port being coupled to a source device having a second impedance. The capacitor has a first end and a second end. The first end of the capacitor is coupled to the second port of the transmission line transformer and the second end is coupled to a ground.

Abstract: A power amplifier includes a transistor, a transmission line transformer, and a capacitor. The transistor is operable to receive a signal and to generate an amplified signal. The transistor has a source, a drain, and a gate. The gate has a first impedance and is operable to receive the signal to be amplified. The transmission line transformer has a first, second, third, and fourth port, the first port being coupled to the gate of the transistor and the third port, and the fourth port being coupled to a source device having a second impedance. The capacitor has a first end and a second end. The first end of the capacitor is coupled to the second port of the transmission line transformer and the second end is coupled to a ground.

Abstract: According to one embodiment of the invention a method for switching an alternating current signal between at least two paths includes providing, in at least one of the paths, first and second field effect transistors in series. The method also includes providing a control voltage node operable to receive a control voltage and maintaining each of the first and second field effect transistors in pinch-off mode by offsetting a voltage on each gate of the field effect transistors with a DC voltage component other than the control voltage when it is desired for the alternating current not to flow through the at least one path.

Abstract: An integrated circuit resistor is provided that comprises a mesa 14 between electrical contacts 16 and 18. The electrical resistance between electrical contacts 16 and 18 is selectively increased through the formation of recesses 20 and 22 in the mesa 14. The size of recesses 20 and 22 can be used to tune the value of the electrical resistance between contacts 16 and 18.

Abstract: An integrated circuit resistor is provided that comprises a mesa 14 between electrical contacts 16 and 18. The electrical resistance between electrical contacts 16 and 18 is selectively increased through the formation of recesses 20 and 22 in the mesa 14. The size of recesses 20 and 22 can be used to tune the value of the electrical resistance between contacts 16 and 18.