Patents by Inventor Jon S. Duster

Jon S. Duster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8018288
    Abstract: Embodiments of a high-linearity low-noise amplifier (LNA) are generally described herein. Other embodiments may be described and claimed. In some embodiments, an RF input signal may be amplified with a cascode amplifier. The cascode amplifier may include integrated notch filters to attenuate undesired signals. The cascode amplifier may operate from a large power supply when blockers are present to avoid voltage swing compression at its output. The cascode amplifier may be biased and designed to operate in a class AB mode to produce linear output current to avoid current compression or excessive current expansion.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: September 13, 2011
    Assignee: Intel Corporation
    Inventors: Jon S. Duster, Stewart S. Taylor
  • Publication number: 20100259331
    Abstract: Embodiments of a high-linearity low-noise amplifier (LNA) are generally described herein. Other embodiments may be described and claimed. In some embodiments, an RF input signal may be amplified with a cascode amplifier. The cascode amplifier may include integrated notch filters to attenuate undesired signals. The cascode amplifier may operate from a large power supply when blockers are present to avoid voltage swing compression at its output. The cascode amplifier may be biased and designed to operate in a class AB mode to produce linear output current to avoid current compression or excessive current expansion.
    Type: Application
    Filed: April 13, 2009
    Publication date: October 14, 2010
    Inventors: Jon S. Duster, Stewart S. Taylor
  • Patent number: 7541875
    Abstract: Embodiments of a high-linearity low-noise amplifier (LNA) and method are generally described herein. Other embodiments may be described and claimed. In some embodiments, an RF input signal may be amplified with a cascode amplifier and a common-gate stage. The common-gate stage is dynamically biased based on an output voltage of the common-gate stage to allow an output voltage swing to be shared between the cascode amplifier and the common-gate stage.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: June 2, 2009
    Assignee: Intel Corporation
    Inventors: Stewart S. Taylor, Jon S. Duster
  • Patent number: 7463093
    Abstract: A variable gain amplifier includes multiple gain stages. Each gain stage includes a gain transistor and a cascode transistor to form a cascode amplifier, and a current diversion transistor to divert current away from a cascode transistor to reduce gain in the stage. A control circuit is included to maintain substantially constant drain-to-source voltage and drain current in the gain transistor.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: December 9, 2008
    Assignee: Intel Corporation
    Inventors: Stewart S. Taylor, Jon S. Duster
  • Publication number: 20080297262
    Abstract: In general, in one aspect, the disclosure describes an amplifier that includes a first transistor coupled to ground and a second transistor coupled to the first transistor and a supply voltage. A voltage biasing circuit is used to provide biased voltages to the first and second transistors. An inductor coupled between the voltage biasing circuit and the second transistor.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 4, 2008
    Inventors: Jon S. Duster, Stewart S. Taylor
  • Publication number: 20080278220
    Abstract: Embodiments of a high-linearity low-noise amplifier (LNA) and method are generally described herein. Other embodiments may be described and claimed. In some embodiments, an RF input signal may be amplified with a cascode amplifier and a common-gate stage. The common-gate stage is dynamically biased based on an output voltage of the common-gate stage to allow an output voltage swing to be shared between the cascode amplifier and the common-gate stage.
    Type: Application
    Filed: May 11, 2007
    Publication date: November 13, 2008
    Inventors: Stewart S. Taylor, Jon S. Duster
  • Publication number: 20080224775
    Abstract: A variable gain amplifier includes multiple gain stages. Each gain stage includes a gain transistor and a cascode transistor to form a cascode amplifier, and a current diversion transistor to divert current away from a cascode transistor to reduce gain in the stage. A control circuit is included to maintain substantially constant drain-to-source voltage and drain current in the gain transistor.
    Type: Application
    Filed: March 16, 2007
    Publication date: September 18, 2008
    Inventors: Stewart S. Taylor, Jon S. Duster