Patents by Inventor Jon S. Owyang

Jon S. Owyang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7205247
    Abstract: A method of depositing a hafnium-based dielectric film is provided. The method comprises atomic layer deposition using ozone and one or more reactants comprising a hafnium precursor. A semiconductor device is also provided. The device comprises a substrate, a hafnium-based dielectric layer formed atop the substrate, and an interfacial layer formed between the substrate and the hafnium-based dielectric layer, wherein the interfacial layer comprises silicon dioxide and has a crystalline structure.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: April 17, 2007
    Assignee: Aviza Technology, Inc.
    Inventors: Sang-In Lee, Jon S. Owyang, Yoshihide Senzaki, Aubrey L. Helms, Jr., Karem Kapkin
  • Patent number: 5897381
    Abstract: Rapid Thermal Processing of a semiconductor wafer is performed by scanning a laser beam across a silicon dioxide film in contact with a surface of the wafer. The silicon dioxide film absorbs the energy from the laser beam and converts the energy to heat. The heat, in turn, is transferred to the wafer. Temperature feedback can be obtained to increase control and uniformity of temperatures across the wafer.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: April 27, 1999
    Assignee: LSI Logic Corporation
    Inventors: Sheldon Aronowitz, Nicholas Eib, Jon S. Owyang
  • Patent number: 5893952
    Abstract: Rapid Thermal Processing of a semiconductor wafer is performed by scanning a laser beam across a silicon dioxide film in contact with a surface of the wafer. The silicon dioxide film absorbs the energy from the laser beam and converts the energy to heat. The heat, in turn, is transferred to the wafer. Temperature feedback can be obtained to increase control and uniformity of temperatures across the wafer.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: April 13, 1999
    Assignee: LSI Logic Corporation
    Inventors: Sheldon Aronowitz, Nicholas Eib, Jon S. Owyang
  • Patent number: 5818100
    Abstract: A method, and resulting product, are disclosed for selectively forming polycrystalline silicon over exposed portions of a single crystal silicon substrate. The method includes inhibiting the formation of such polycrystalline silicon over adjacent silicon oxide surfaces; and the resulting product of such a process. The polycrystalline silicon is selectively deposited over the single crystal silicon substrate by first forming a thin layer of a lattice mismatched material over the single crystal silicon surface, and then depositing a layer of polycrystalline silicon over the lattice mismatched material. Preferably, the thin lattice mismatched layer comprises a silicon/germanium (SiGe) alloy.
    Type: Grant
    Filed: March 25, 1997
    Date of Patent: October 6, 1998
    Assignee: LSI Logic Corporation
    Inventors: Douglas T. Grider, Jon S. Owyang
  • Patent number: 5756369
    Abstract: Rapid Thermal Processing of a semiconductor wafer is performed by scanning a laser beam across a silicon dioxide film in contact with a surface of the wafer. The silicon dioxide film absorbs the energy from the laser beam and converts the energy to heat. The heat, in turn, is transferred to the wafer. Temperature feedback can be obtained to increase control and uniformity of temperatures across the wafer.
    Type: Grant
    Filed: July 11, 1996
    Date of Patent: May 26, 1998
    Assignee: LSI Logic Corporation
    Inventors: Sheldon Aronowitz, Nicholas Eib, Jon S. Owyang
  • Patent number: 5646073
    Abstract: A method, and resulting product, are disclosed for selectively forming polycrystalline silicon over exposed portions of a single crystal silicon substrate. The method includes inhibiting the formation of such polycrystalline silicon over adjacent silicon oxide surfaces; and the resulting product of such a process. The polycrystalline silicon is selectively deposited over the single crystal silicon substrate by first forming a thin layer of a lattice mismatched material over the single crystal silicon surface, and then depositing a layer of polycrystalline silicon over the lattice mismatched material. Preferably, the thin lattice mismatched layer comprises a silicon/germanium (SiGe) alloy.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: July 8, 1997
    Assignee: LSI Logic Corporation
    Inventors: Douglas T. Grider, Jon S. Owyang