Patents by Inventor Jon Sauer
Jon Sauer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8546168Abstract: A system and method employing at least one semiconductor device, or an arrangement of insulating and metal layers, having at least one detecting region which can include, for example, a recess or opening therein, for detecting a charge representative of a component of a polymer, such as a nucleic acid strand proximate to the detecting region, and a method for manufacturing such a semiconductor device. The system and method can thus be used for sequencing individual nucleotides or bases of ribonucleic acid (RNA) or deoxyribonucleic acid (DNA). The semiconductor device includes at least two doped regions, such as two n-typed regions implanted in a p-typed semiconductor layer or two p-typed regions implanted in an n-typed semiconductor layer. The detecting region permits a current to pass between the two doped regions in response to the presence of the component of the polymer.Type: GrantFiled: September 14, 2012Date of Patent: October 1, 2013Assignee: Life Technologies CorporationInventors: Jon Sauer, Bart van Zeghbroeck
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Patent number: 8426232Abstract: A system and method employ at least one semiconductor device, or an arrangement of insulating and metal layers, having at least one detecting region which can include, for example, a recess or opening therein, for detecting a charge representative of a component of a polymer, such as a nucleic acid strand proximate to the detecting region. A method for manufacturing forms such a semiconductor device. The system and method can be used for sequencing individual nucleotides or bases of ribonucleic acid (RNA) or deoxyribonucleic acid (DNA). The detecting region permits a current to pass between the two doped regions in response to the presence of the component of the polymer, such as a base of a DNA or RNA strand. The current has characteristics representative of the component of the polymer, such as characteristics representative of the detected base of the DNA or RNA strand.Type: GrantFiled: March 1, 2012Date of Patent: April 23, 2013Assignee: Life Technologies CorporationInventors: Jon Sauer, Bart Van Zeghbroeck
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Patent number: 8232582Abstract: A system and method employing at least one semiconductor device, or an arrangement of insulating and metal layers, having at least one detecting region which can include, for example, a recess or opening therein, for detecting a charge representative of a component of a polymer, such as a nucleic acid strand, proximate to the detecting region, and a method for manufacturing such a semiconductor device. The system and method can thus be used for sequencing individual nucleotides or bases of ribonucleic acid (RNA) or deoxyribonucleic acid (DNA). The semiconductor device includes at least two doped regions, such as two n-type regions implanted in a p-type semiconductor layer or two p-type regions implanted in an n-type semiconductor layer. The detecting region permits a current to pass between the two doped regions in response to the presence of the component of the polymer, such as a base of a DNA or RNA strand.Type: GrantFiled: December 13, 2005Date of Patent: July 31, 2012Assignee: Life Technologies CorporationInventors: Jon Sauer, Bart van Zeghbroeck
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Patent number: 7324145Abstract: A new multiple imager array device is achieved. The device comprises, first, a bi-directional bus. An array of imagers is arranged in n rows and m columns. The n and m are positive integers. Each imager is connected to the bi-directional bus. A line of bits of any imager is accessible by a line address. Each imager has a Vmode input and an output enable input. The Vmode input and the output enable input must be enabled to allow accessing. A first multiplexer has an input and a plurality of outputs. The input is connected to a column counter. Each output is connected to the output enable input of one of the imagers. A second-multiplexer has an input and a plurality of outputs. The input is connected to a row counter. Each output is connected to the Vmode input of each imager in one of the rows.Type: GrantFiled: January 27, 2004Date of Patent: January 29, 2008Assignee: Digital Imaging Systems GmbHInventors: Nathaniel Joseph McCaffrey, Donald Jon Sauer
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Publication number: 20060154399Abstract: A system and method employing at least one semiconductor device, or an arrangement of insulating and metal layers, having at least one detecting region which can include, for example, a recess or opening therein, for detecting a charge representative of a component of a polymer, such as a nucleic acid strand, proximate to the detecting region, and a method for manufacturing such a semiconductor device. The system and method can thus be used for sequencing individual nucleotides or bases of ribonucleic acid (RNA) or deoxyribonucleic acid (DNA). The semiconductor device includes at least two doped regions, such as two n-type regions implanted in a p-type semiconductor layer or two p-type regions implanted in an n-type semiconductor layer. The detecting region permits a current to pass between the two doped regions in response to the presence of the component of the polymer, such as a base of a DNA or RNA strand.Type: ApplicationFiled: December 13, 2005Publication date: July 13, 2006Inventors: Jon Sauer, Barl van Zeghbroeck
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Publication number: 20040189840Abstract: A new multiple imager array device is achieved. The device comprises, first, a bi-directional bus. An array of imagers is arranged in n rows and m columns. The n and m are positive integers. Each imager is connected to the bi-directional bus. A line of bits of any imager is accessible by a line address. Each imager has a Vmode input and an output enable input. The Vmode input and the output enable input must be enabled to allow accessing. A first multiplexer has an input and a plurality of outputs. The input is connected to a column counter. Each output is connected to the output enable input of one of the imagers. A second-multiplexer has an input and a plurality of outputs. The input is connected to a row counter. Each output is connected to the Vmode input of each imager in one of the rows.Type: ApplicationFiled: January 27, 2004Publication date: September 30, 2004Applicant: Dialog Semiconductor GmbhInventors: Nathaniel Joseph McCaffrey, Donald Jon Sauer
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Patent number: 6320616Abstract: A correlated double-sampling circuit for sampling an input signal received from a pixel sensor circuit via an input line. According to one embodiment, a first switch selectively couples a junction of first terminals of a first capacitor and a second capacitor to the input line. A second switch selectively couples an output node coupled to a second terminal of the second capacitor to a reference voltage. A third switch selectively couples the output node to an output line.Type: GrantFiled: June 2, 1997Date of Patent: November 20, 2001Assignee: Sarnoff CorporationInventor: Donald Jon Sauer
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Patent number: 6249001Abstract: An infrared imager includes an array of capacitance sensors that operate at room temperature. Each infrared capacitance sensor includes a deflectable first plate which expands due to absorbed thermal radiation relative to a non-deflectable second plate. In one embodiment each infrared capacitance sensor is composed of a bi-material strip which changes the position of one plate of a sensing capacitor in response to temperature changes due to absorbed incident thermal radiation. The bi-material strip is composed of two materials with a large difference in thermal expansion coefficients.Type: GrantFiled: April 8, 1999Date of Patent: June 19, 2001Assignee: Sarnoff CorporationInventors: Donald Jon Sauer, Ramon Ubaldo Martinelli, Robert Amantea, Peter Alan Levine
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Patent number: 6101294Abstract: A imager has an array of photodetectors, each of which accumulates charge during an integration period as a result of light detected during said integration period, said array having a charge capacity which increases during the integration period. A charge capacity controller coupled to said imager adjusts how the imager increases the charge capacity of the array based upon the brightness distribution detected by said imager during at least one previous integration period.Type: GrantFiled: June 2, 1997Date of Patent: August 8, 2000Assignee: Sarnoff CorporationInventors: Nathaniel Joseph McCaffrey, Donald Jon Sauer, Peter A. Levine, Francis P. Pantuso
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Patent number: 6040570Abstract: The invention relates to an extended dynamic range imager. An array of pixels provides an output signal for each pixel related to an amount of light captured for each pixel during an integration period. A row of extended dynamic range (XDR) sample and hold circuits having an XDR sample and hold circuit for each column of the array captures an XDR signal related to a difference between the output signal and an XDR clamp level to which the pixel is reset at a predetermined time before the end of the integration period. A row of linear sample and hold circuits having a linear sample and hold circuit for each column of the array captures a linear signal related to a difference between the output signal and an initial output signal to which the pixel is reset at the beginning of the integration period.Type: GrantFiled: May 29, 1998Date of Patent: March 21, 2000Assignee: Sarnoff CorporationInventors: Peter Alan Levine, Donald Jon Sauer, Nathaniel Joseph McCaffrey
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Patent number: 5969758Abstract: An imaging system and method for correcting for differences between correlated double sampling (CDS) circuits of a row of CDS circuits of an imager of the imaging system. According to one embodiment, a plurality of gain correction coefficients having an initial value and a plurality of dc offset correction coefficients having an initial value are stored. A reference dc offset value and a reference gain value are determined, and a dc offset value and a gain value for each CDS circuit is determined. The dc offset value and gain value for each CDS circuit is compared to the reference dc offset value and reference gain value, respectively, and the plurality of gain correction coefficients and the plurality of dc offset correction coefficients is updated in accordance with the comparisons.Type: GrantFiled: June 2, 1997Date of Patent: October 19, 1999Assignee: Sarnoff CorporationInventors: Donald Jon Sauer, Peter Alan Levine
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Patent number: 5965886Abstract: An infrared imager includes an array of capacitance sensors that operate at room temperature. Each infrared capacitance sensor includes a deflectable first plate which expands due to absorbed thermal radiation relative to a non-deflectable second plate. In one embodiment each infrared capacitance sensor is composed of a bi-material strip which changes the position of one plate of a sensing capacitor in response to temperature changes due to absorbed incident thermal radiation. The bi-material strip is composed of two materials with a large difference in thermal expansion coefficients.Type: GrantFiled: March 14, 1997Date of Patent: October 12, 1999Assignee: Sarnoff CorporationInventors: Donald Jon Sauer, Ramon Ubaldo Martinelli, Robert Amantea, Peter Alan Levine
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Patent number: 5920199Abstract: The invention relates to an apparatus and method for detecting electrical charge with a long integration time and in particular to a sampling method which reduces noise that affects the accuracy of the measurement of the total charge. The apparatus samples the charge on the capacitor at the start of the integration period to obtain a sample proportional to a first noise component. It then samples the charge on the capacitor at the end of an integration period and subtracts the noise component sample from the integrated charge sample to obtain a measure of integrated charge to the relative exclusion of the noise component. The circuit uses a folded cascode amplifier and at least one correlated double sampling circuit. The charge detector can be used with any apparatus which generates electrical charge in response to an input including for example, a photodetector, photomultiplier, ion detector, e beam detector and piezoelectric charge detector and arrays of such devices.Type: GrantFiled: November 21, 1997Date of Patent: July 6, 1999Assignee: Sarnoff CorporationInventor: Donald Jon Sauer
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Patent number: 5920345Abstract: An active pixel sensor circuit and method. According to one embodiment, a photodetector produces a voltage at a floating diffusion node in accordance with light sensed by the photodetector. An active element is coupled at a control terminal to the floating diffusion node and is directly couplable at an output terminal to an output line. The active element is configured to provide an output voltage on the output line having a magnitude related to the magnitude of the floating diffusion node voltage.Type: GrantFiled: June 2, 1997Date of Patent: July 6, 1999Assignee: Sarnoff CorporationInventor: Donald Jon Sauer
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Patent number: 5844238Abstract: An infrared imager includes an array of capacitance sensors that operate at room temperature. Each infrared capacitance sensor includes a deflectable first plate which expands due to absorbed thermal radiation relative to a non-deflectable second plate. In one embodiment each infrared capacitance sensor is composed of a bi-material strip which changes the position of one plate of a sensing capacitor in response to temperature changes due to absorbed incident thermal radiation. The bi-material strip is composed of two materials with a large difference in thermal expansion coefficients.Type: GrantFiled: March 27, 1996Date of Patent: December 1, 1998Assignee: David Sarnoff Research Center, Inc.Inventors: Donald Jon Sauer, Ramon Ubaldo Martinelli, Robert Amantea, Peter Alan Levine
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Patent number: 5754056Abstract: The invention relates to an apparatus and method for detecting electrical charge with a long integration time and in particular to a sampling method which reduces noise that affects the accuracy of the measurement of the total charge. The apparatus samples the charge on the capacitor at the start of the integration period to obtain a sample proportional to a first noise component. It then samples the charge on the capacitor at the end of an integration period and subtracts the noise component sample from the integrated charge sample to obtain a measure of integrated charge to the relative exclusion of the noise component. The circuit uses a folded cascode amplifier and at least one correlated double sampling circuit. The charge detector can be used with any apparatus which generates electrical charge in response to an input including for example, a photodetector, photomultiplier, ion detector, e beam detector and piezoelectric charge detector and arrays of such devices.Type: GrantFiled: February 10, 1997Date of Patent: May 19, 1998Assignee: David Sarnoff Research Center, Inc.Inventor: Donald Jon Sauer
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Patent number: 5731743Abstract: A frequency synthesizer including a fixed frequency oscillator providing a plurality of waveforms having a first frequency, each waveform being delayed in time with respect to another of the waveforms, and a waveform selector, the waveform selector operable to continuously select as an output waveform a waveform from the plurality of waveforms. In an embodiment, the selection of the waveform is made to provide an output waveform having low jitter with respect to an ideal waveform.Type: GrantFiled: October 7, 1996Date of Patent: March 24, 1998Assignee: David Sarnoff Research Center, Inc.Inventor: Donald Jon Sauer
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Patent number: 4010485Abstract: The charge known as "fat zero", employed to reduce charge transfer losses in charge coupled device (CCD) registers is introduced at a fixed ratio to the binary one charge level. This is accomplished by employing two CCD channels having different widths, one for signals, the other for fat zeros, which channels converge into a common channel. The same voltages are employed for the introduction of both charges so that only the geometry of the channels determines the binary one to fat zero charge signal ratio.Type: GrantFiled: June 13, 1974Date of Patent: March 1, 1977Assignee: RCA CorporationInventor: Donald Jon Sauer
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Patent number: 3967254Abstract: Output gate electrode structure between the storage matrix and the output register of a serial-parallel-serial (SPS) charge coupled device (CCD) memory. To permit high channel packing density in the matrix, the output register can have as few as M/N stages, where M is the number of channels in the matrix and N the number of phases employed for operating the register. The gate structure transfers 1/N'th of a word at a time to the output register and while this 1/N'th of a word is being propagated out of the register, the remaining part (or parts), if any, of the word are stored while the gate structure provides a potential barrier between this stored charge and the register.Type: GrantFiled: November 18, 1974Date of Patent: June 29, 1976Assignee: RCA CorporationInventors: Walter Frank Kosonocky, Donald Jon Sauer