Abstract: Examples describe data security for communication systems. One example includes validating a merchant system using merchant data and generating a set of merchant credentials. The set of merchant credentials is then used in authentication to facilitate a secure transaction, which involves automatically generating transaction data with a tokenized client account number associated with the secure transaction. A refund request associated with the secure transaction is received with the set of merchant credentials that are used for automatically authenticating the merchant system. The example then involves accessing a database that includes the transaction data for automatically facilitating settlement of a refund payment using the authenticated merchant system and the transaction data.

Abstract: A sensor assembly may be mounted in a ceiling used with an associated light fixture. The sensor assembly may include a body including a sensor end and a blade end opposite the sensor end. A sensor may be disposed on the body nearer the sensor end than the blade end. A cutting blade may be disposed on the body nearer the blade end than the sensor end. The cutting blade may be configured to cut an opening in the ceiling. At least one retainer protrusion may be disposed on the body between the sensor and the cutting blade. The at least one retainer protrusion may be configured to retain the sensor assembly in the opening of the ceiling.

Abstract: A memory device with die stacking is provided. A plurality of substrates layers are stacked together into a stack. Each substrate layer may include a substrate having a plurality of cavities to receive integrated circuit components within the thickness of the substrate. A plurality of conductive spheres are arranged between at least two adjacent substrate layers and are electrically coupled to the integrated circuit components in at least one of the two adjacent substrates. The two adjacent substrate layers of the stack include: (a) a first substrate having a first plurality of cavities to receive integrated circuit components, and (b) a second substrate having a second plurality of cavities to receive integrated circuit components, wherein the first plurality of cavities is offset from a second plurality of cavities.

Abstract: On implementation of the invention provides a stackable chip-scale package for improving memory density that may be mounted within a limited area or module. A novel staggered routing scheme enables the use of the same trace routing at every level of the stacked architecture for efficiently accessing individual memory devices in a chip-scale package stack. The use of a ball grid array chip-scale package architecture in combination with thermally compatible materials decreases the risk of thermal cracking while improving heat dissipation. Moreover, this architecture permits mounting support components, such as capacitors and resistors, on the chip-scale package.