Patents by Inventor Jon Shiell

Jon Shiell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11362645
    Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each power island of the plurality of power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: June 14, 2022
    Assignee: Mosaid Technologies Incorporated
    Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
  • Publication number: 20210036689
    Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.
    Type: Application
    Filed: July 14, 2020
    Publication date: February 4, 2021
    Inventors: Barry Alan HOBERMAN, Daniel L. HILLMAN, Jon Shiell
  • Patent number: 10749506
    Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within said each power island. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of said one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of said one power island of the plurality of power islands to the target power level.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: August 18, 2020
    Assignee: Conversant Intellectual Property Management Inc.
    Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
  • Publication number: 20190173453
    Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 6, 2019
    Inventors: Barry Alan HOBERMAN, Daniel L. HILLMAN, Jon Shiell
  • Patent number: 10243542
    Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: March 26, 2019
    Assignee: Conversant Intellectual Property Management Inc.
    Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
  • Patent number: 10200015
    Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: February 5, 2019
    Assignee: Conversant Intellectual Property Management Inc.
    Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
  • Publication number: 20170288649
    Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands where power consumption is independently controlled within each of the power islands. A power manager determines a target power level for one of the power islands. The power manager then determines an action to change a consumption power level of the one of the power islands to the target power level. The power manager performs the action to change the consumption power level of the one of the power islands to the target power level.
    Type: Application
    Filed: April 18, 2017
    Publication date: October 5, 2017
    Applicant: Conversant Intellectual Property Management Inc.
    Inventors: Barry Alan HOBERMAN, Daniel L. HILLMAN, Jon Shiell
  • Patent number: 9660616
    Abstract: Systems and methods for managing power in an integrated circuit using power islands are disclosed. The integrated circuit includes a plurality of power islands where power consumption is independently controlled within each of the power islands. A power manager determines a target power level for one of the power islands. The power manager then determines an action to change a consumption power level of the one of the power islands to the target power level. The power manager performs the action to change the consumption power level of the one of the power islands to the target power level.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: May 23, 2017
    Assignee: Conversant Intellectual Property Management Inc.
    Inventors: Barry Alan Hoberman, Daniel L Hillman, Jon Shiell
  • Publication number: 20160087608
    Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands where power consumption is independently controlled within each of the power islands. A power manager determines a target power level for one of the power islands. The power manager then determines an action to change a consumption power level of the one of the power islands to the target power level. The power manager performs the action to change the consumption power level of the one of the power islands to the target power level.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 24, 2016
    Applicant: Conversant Intellectual Property Management Inc.
    Inventors: Barry Alan HOBERMAN, Daniel L HILLMAN, Jon Shiell
  • Patent number: 9166412
    Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: October 20, 2015
    Assignee: Conversant Intellectual Property Management Inc.
    Inventors: Barry Alan Hoberman, Daniel L Hillman, Jon Shiell
  • Publication number: 20140333134
    Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.
    Type: Application
    Filed: July 7, 2014
    Publication date: November 13, 2014
    Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
  • Patent number: 8782590
    Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: July 15, 2014
    Assignee: Conversant Intellectual Property Management Inc.
    Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
  • Patent number: 8762923
    Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: June 24, 2014
    Assignee: Conversant Intellectual Property Management Inc.
    Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
  • Publication number: 20120256485
    Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.
    Type: Application
    Filed: May 16, 2012
    Publication date: October 11, 2012
    Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
  • Publication number: 20120043812
    Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.
    Type: Application
    Filed: June 20, 2011
    Publication date: February 23, 2012
    Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
  • Publication number: 20120032965
    Abstract: An accelerator chip can be positioned between a processor chip and a memory: The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.
    Type: Application
    Filed: August 10, 2011
    Publication date: February 9, 2012
    Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
  • Publication number: 20120019549
    Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.
    Type: Application
    Filed: May 25, 2011
    Publication date: January 26, 2012
    Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
  • Publication number: 20120023310
    Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.
    Type: Application
    Filed: May 25, 2011
    Publication date: January 26, 2012
    Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
  • Publication number: 20120001926
    Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.
    Type: Application
    Filed: May 25, 2011
    Publication date: January 5, 2012
    Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
  • Patent number: RE44025
    Abstract: Methods and/or associated devices and/or systems for providing power management in electronic circuits, including custom ICs, programmable logic devices, and application specific integrated circuits (ASICs) places portions of various power management solutions in the I/O ring or in I/O macros. The invention has numerous specific embodiments and applications to a wide variety of ICs and logic or other circuit design components including circuit modules, software descriptions of circuit modules and/or design or simulation or test systems for circuit development.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: February 19, 2013
    Assignee: Jr. Shadt Electronics, LLC
    Inventors: Robert Eisenstadt, Jon Shiell