Patents by Inventor Jon Shiell
Jon Shiell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11362645Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each power island of the plurality of power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.Type: GrantFiled: July 14, 2020Date of Patent: June 14, 2022Assignee: Mosaid Technologies IncorporatedInventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
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Publication number: 20210036689Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.Type: ApplicationFiled: July 14, 2020Publication date: February 4, 2021Inventors: Barry Alan HOBERMAN, Daniel L. HILLMAN, Jon Shiell
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Patent number: 10749506Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within said each power island. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of said one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of said one power island of the plurality of power islands to the target power level.Type: GrantFiled: December 20, 2018Date of Patent: August 18, 2020Assignee: Conversant Intellectual Property Management Inc.Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
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Publication number: 20190173453Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.Type: ApplicationFiled: December 20, 2018Publication date: June 6, 2019Inventors: Barry Alan HOBERMAN, Daniel L. HILLMAN, Jon Shiell
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Patent number: 10243542Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.Type: GrantFiled: April 18, 2017Date of Patent: March 26, 2019Assignee: Conversant Intellectual Property Management Inc.Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
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Patent number: 10200015Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.Type: GrantFiled: April 18, 2017Date of Patent: February 5, 2019Assignee: Conversant Intellectual Property Management Inc.Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
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Publication number: 20170288649Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands where power consumption is independently controlled within each of the power islands. A power manager determines a target power level for one of the power islands. The power manager then determines an action to change a consumption power level of the one of the power islands to the target power level. The power manager performs the action to change the consumption power level of the one of the power islands to the target power level.Type: ApplicationFiled: April 18, 2017Publication date: October 5, 2017Applicant: Conversant Intellectual Property Management Inc.Inventors: Barry Alan HOBERMAN, Daniel L. HILLMAN, Jon Shiell
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Patent number: 9660616Abstract: Systems and methods for managing power in an integrated circuit using power islands are disclosed. The integrated circuit includes a plurality of power islands where power consumption is independently controlled within each of the power islands. A power manager determines a target power level for one of the power islands. The power manager then determines an action to change a consumption power level of the one of the power islands to the target power level. The power manager performs the action to change the consumption power level of the one of the power islands to the target power level.Type: GrantFiled: September 25, 2015Date of Patent: May 23, 2017Assignee: Conversant Intellectual Property Management Inc.Inventors: Barry Alan Hoberman, Daniel L Hillman, Jon Shiell
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Publication number: 20160087608Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands where power consumption is independently controlled within each of the power islands. A power manager determines a target power level for one of the power islands. The power manager then determines an action to change a consumption power level of the one of the power islands to the target power level. The power manager performs the action to change the consumption power level of the one of the power islands to the target power level.Type: ApplicationFiled: September 25, 2015Publication date: March 24, 2016Applicant: Conversant Intellectual Property Management Inc.Inventors: Barry Alan HOBERMAN, Daniel L HILLMAN, Jon Shiell
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Patent number: 9166412Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.Type: GrantFiled: July 7, 2014Date of Patent: October 20, 2015Assignee: Conversant Intellectual Property Management Inc.Inventors: Barry Alan Hoberman, Daniel L Hillman, Jon Shiell
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Publication number: 20140333134Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.Type: ApplicationFiled: July 7, 2014Publication date: November 13, 2014Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
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Patent number: 8782590Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.Type: GrantFiled: June 20, 2011Date of Patent: July 15, 2014Assignee: Conversant Intellectual Property Management Inc.Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
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Patent number: 8762923Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.Type: GrantFiled: May 16, 2012Date of Patent: June 24, 2014Assignee: Conversant Intellectual Property Management Inc.Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
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Publication number: 20120256485Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.Type: ApplicationFiled: May 16, 2012Publication date: October 11, 2012Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
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Publication number: 20120043812Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.Type: ApplicationFiled: June 20, 2011Publication date: February 23, 2012Inventors: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
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Publication number: 20120032965Abstract: An accelerator chip can be positioned between a processor chip and a memory: The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.Type: ApplicationFiled: August 10, 2011Publication date: February 9, 2012Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
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Publication number: 20120019549Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.Type: ApplicationFiled: May 25, 2011Publication date: January 26, 2012Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
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Publication number: 20120023310Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.Type: ApplicationFiled: May 25, 2011Publication date: January 26, 2012Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
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Publication number: 20120001926Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.Type: ApplicationFiled: May 25, 2011Publication date: January 5, 2012Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
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Patent number: RE44025Abstract: Methods and/or associated devices and/or systems for providing power management in electronic circuits, including custom ICs, programmable logic devices, and application specific integrated circuits (ASICs) places portions of various power management solutions in the I/O ring or in I/O macros. The invention has numerous specific embodiments and applications to a wide variety of ICs and logic or other circuit design components including circuit modules, software descriptions of circuit modules and/or design or simulation or test systems for circuit development.Type: GrantFiled: July 18, 2008Date of Patent: February 19, 2013Assignee: Jr. Shadt Electronics, LLCInventors: Robert Eisenstadt, Jon Shiell