Abstract: Example channel circuits, data storage devices, and methods for data read synchronization from phase modulated synchronization fields are described. A data synchronization detector may receive an oversampled digital read signal read from a synchronization field that uses a single written pattern to encode the start of data position, phase, and gain for the read channel. The write pattern may use a phase modulated carrier signal to encode a pseudo-random binary sequence indicating the start of data position.

Abstract: Example channel circuits, data storage devices, and methods for data read synchronization from phase modulated synchronization fields are described. A data synchronization detector may receive an oversampled digital read signal read from a synchronization field that uses a single written pattern to encode the start of data position, phase, and gain for the read channel. The write pattern may use a phase modulated carrier signal to encode a pseudo-random binary sequence indicating the start of data position.

Abstract: Example systems, data storage devices, testers, and methods for storage device configuration using symbol context mutual information are described. A data storage device may include channel circuit configuration settings for the encoding and decoding of data written to a non-volatile storage medium. The configuration settings may be determined by determining a known pattern for a sector, determining a series of symbol contexts, determining mutual information for each symbol context, and using the symbol context mutual information to determine relationships among configuration settings, such as bit size, error correction code rate, and modulation code. Once determined, the configuration settings may be used to configure the modulation code and ECC rate for the channel circuit of the data storage device.

Abstract: Example systems, read channel circuits, data storage devices, and methods to use a global variance parameter based on mutual information to modify operation of a soft output detector in a read channel are described. The read channel circuit includes a soft output detector, such as a soft output Viterbi algorithm (SOVA) detector that includes variance terms. The variance terms are modified by a global variance parameter based on mutual information values. The soft output detector processes an input signal using the modified branch variance terms to determine data bits and corresponding soft information for decoding data in the read channel.

Abstract: Example systems, data storage devices, testers, and methods for storage device configuration using mutual information are described. A data storage device may include channel circuit configuration settings for the encoding and decoding of data written to a non-volatile storage medium. Mutual information metrics may be calculated based on a multi-bit symbol size to compensate for inter-symbol interference and compared to mutual information thresholds to determine the configuration settings, such as bit and track densities, error correction codes, and modulation codes. Mutual information metrics may be used to characterize heads and media independent of the configuration settings.

Abstract: Example channel circuits, data storage devices, and methods for using an adjustable code rate based on an extendable parity code matrix based on write verification determining extended parity are described. A data unit with a base set of parity bits may be written to a non-volatile storage medium and then read back for write verification. The data unit may be decoded using the base set of parity bits and corresponding primary parity matrix. Based on the decoding of the write verification read signal, a number of parity bits for an extended set of parity bits may be determined and the extended set of parity bits may be stored to an extended parity storage location for use during subsequent read operations.

Abstract: Example systems, read channels, and methods provide multiple neural network training nodes for processing read data signals prior to symbol detection and decoding. A plurality of neural network circuits receive read data signals and modify them based on different neural network configurations and sets of trained node coefficients. Each neural network circuit may pass modified read data signals directly to another neural network circuit or determine a parameter for modifying processing of the read data signals by another component. In some configurations, the last neural network circuit may pass the output read data signal to a soft output detector for determining the symbols in the read data signal.

Abstract: Example systems and methods for using nested error correction codes for DNA data storage are described. A data unit may be encoded in a set of oligos. Using an error correction code, such as an LDPC code, a codeword may be determined for the data unit that is a multiple of the data payload capacity of each oligo. The codeword may be divided among the set of oligos, along with corresponding redundancy data. Any number of additional levels of nested error correction codes may be implemented by aggregating sets of smaller codewords into larger codewords and storing the corresponding redundancy data in the set of oligos. Each nested level may be aggregated from the set of oligos and decoded using the corresponding error correction code matrix and set of redundancy data as needed, such as in response to failure to decode codewords at a lower level.

Abstract: Example systems and methods for using synchronization marks to correct insertions and deletions for DNA data storage are described. A data unit may be encoded in oligos that include synchronization marks at predetermined intervals along the length of each oligo. During decoding, the synchronization marks may improve identification and isolation of insertions and deletions for correction of symbol alignment prior to error correction code decoding. In some configurations, correlation analysis may be used to improve isolation of insertions and deletions where multiple copies of the same oligo are available.

Abstract: Example channel circuits, data storage devices, and methods for using a trained neural network to estimate the noise mixture in a read signal are described. Samples are determined from a digital read signal, such as the read signal from the non-volatile storage medium of a data storage device. The samples are processed through one or more instances of a neural network comprised of trained coefficients and outputting a set of estimate values for a noise mixture of the read signal. The set of estimate values may then be used to adjust parameters of the read channel for processing the read signal to detect and decode data.

Abstract: A data storage device includes a memory device including a plurality of wordlines, each wordline having a plurality of cells, and a cell statistics generator (CSG) disposed on the memory device. The CSG includes logic configured to receive a plurality of left read senses and a plurality of right read senses for the plurality of cells of a wordline, determine a plurality of first windows and a plurality of second windows, determine a left window sum and a right window sum, determine a deviation parameter and a dispersion parameter based on the left window sum and the right window sum, and determine one or more characteristics of the plurality of cells based on the deviation parameter and the dispersion parameter. The deviation parameter and the dispersion parameter are used to describe a number of errors of the left read sense and the right read sense.

Abstract: Example systems, read channels, and methods provide states equalization for a digital data signal in preparation for a soft output detector. The states equalizer determines a set of signal values from the digital data signal and filters the set of signal values through a set of finite impulse response filters configured to generate a set of state values for a target signal value, where each filter corresponds to a potential state of the target signal value. Based on the state values, a set of probabilities for possible states is determined and used to populate a decision matrix for a soft output detector.

Abstract: Example channel circuits, data storage devices, and methods for using an adjustable code rate based on an extendable parity code matrix based on write verification determining extended parity are described. A data unit with a base set of parity bits may be written to a non-volatile storage medium and then read back for write verification. The data unit may be decoded using the base set of parity bits and corresponding primary parity matrix. Based on the decoding of the write verification read signal, a number of parity bits for an extended set of parity bits may be determined and the extended set of parity bits may be stored to an extended parity storage location for use during subsequent read operations.

Abstract: Example systems, read channels, and methods provide states equalization for a digital data signal in preparation for a soft output detector. The states equalizer determines a set of signal values from the digital data signal and filters the set of signal values through a set of finite impulse response filters configured to generate a set of state values for a target signal value, where each filter corresponds to a potential state of the target signal value. Based on the state values, a set of probabilities for possible states is determined and used to populate a decision matrix for a soft output detector.

Abstract: A non-volatile memory device includes a plurality of wordlines, each comprising a plurality of cells, a hard decode configured to read each cell of the plurality of cells at a hard decode voltage, a left read sense configured to read voltage values of each cell to the left of the hard decode voltage at a left read sense voltage, a right read sense configured to read voltage values of each cell to the right of the hard decode voltage at a right read sense voltage, a first combiner configured to determine a difference of voltage values read by the left read sense and right read sense to produce a dispersion signal, and a second combiner configured to determine a sum of the voltage values read by the left read sense and right read sense to produce a deviation signal.

Abstract: Example systems, read channel circuits, data storage devices, and methods to provide signal correction based on soft information in a read channel are described. The read channel circuit includes a soft output detector, such as a soft output Viterbi algorithm (SOVA) detector, and a signal correction circuit. The soft output detector passes detected data bits and corresponding soft information to the signal correction circuit. The signal correction circuit uses the soft information to determine a signal correction value, which is combined with input signal to return a corrected signal to the soft output detector for a next iteration. In some configurations, the signal correction value may compensate for DC offset, AC coupling poles, and/or signal asymmetries to reduce baseline wander in the read channel.

Abstract: Example systems, read channel circuits, data storage devices, and methods to provide signal correction based on soft information in a read channel are described. The read channel circuit includes a soft output detector, such as a soft output Viterbi algorithm (SOVA) detector, and a signal correction circuit. The soft output detector passes detected data bits and corresponding soft information to the signal correction circuit. The signal correction circuit uses the soft information to determine a signal correction value, which is combined with input signal to return a corrected signal to the soft output detector for a next iteration. In some configurations, the signal correction value may compensate for DC offset, AC coupling poles, and/or signal asymmetries to reduce baseline wander in the read channel.

Abstract: Example systems, read channel circuits, data storage devices, and methods to use inter-symbol interference message passing (ISI-MP) data in a read channel are described. The read channel circuit includes a soft output detector, such as a soft output Viterbi algorithm (SOVA) detector, configured to determine both the first most likely and second most likely sets of symbols and output inter-symbol interference data based on the adjacent symbols and corresponding ISI in each set of symbols. The inter-symbol interference data may be used by an ISI-MP circuit configured to model ISI-MP and provide feedback to an iterative decoder during local iterations.

Abstract: A data storage device includes a memory device including a plurality of wordlines, each including a plurality of cells, and a cell statistics generator (CSG) disposed on the memory device. The CSG includes logic configured to receive a first read sense at a threshold voltage of one or more threshold voltages of each cell of a wordline of the plurality of wordlines, determine that a second read sense is required based on the first read sense, receive the second read sense, determine a deviation parameter and a dispersion parameter for an asymmetric adjustment of the left threshold voltage and the right threshold voltage, and adjust the left threshold voltage and the right threshold voltage based on the deviation parameter and the dispersion parameter. The second read sense includes a plurality of left read senses at a left threshold voltage and a plurality of right senses at a right threshold voltage.

Abstract: A data storage device includes a memory device including a plurality of wordlines, each including a plurality of cells, and a cell statistics generator (CSG) disposed on the memory device. The CSG includes logic configured to receive a first read sense at a threshold voltage of one or more threshold voltages of each cell of a wordline of the plurality of wordlines, determine that a second read sense is required based on the first read sense, receive the second read sense, determine a deviation parameter and a dispersion parameter for an asymmetric adjustment of the left threshold voltage and the right threshold voltage, and adjust the left threshold voltage and the right threshold voltage based on the deviation parameter and the dispersion parameter. The second read sense includes a plurality of left read senses at a left threshold voltage and a plurality of right senses at a right threshold voltage.