Patents by Inventor Jonathan A. Babb

Jonathan A. Babb has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090294514
    Abstract: A friction stir welding system that enables clamping of a pipe to enable friction stir welding around the pipe OD, a movable mandrel that provides a counter-force to the pressure exerted on the outside of a pipe by a tool, and a system for providing friction stir welding and repair inside a nuclear vessel in an underwater environment.
    Type: Application
    Filed: July 13, 2009
    Publication date: December 3, 2009
    Applicants: SII MegaDiamond, Inc., Advanced Metal Products, Inc.
    Inventors: Jonathan A. Babb, Brian E. Taylor, Russell J. Steel, Chris Reed, Scott M. Packer
  • Patent number: 7494040
    Abstract: A friction stir welding system that enables clamping of a pipe to enable friction stir welding around the pipe OD, a movable mandrel that provides a counter-force to the pressure exerted on the outside of a pipe by a tool, and a system for providing friction stir welding and repair inside a nuclear vessel in an underwater environment.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: February 24, 2009
    Assignees: SII MegaDiamond, Inc., Advanced Metal Products, Inc.
    Inventors: Jonathan A. Babb, Brian E. Taylor, Russell J. Steel, Chris Reed, Scott M. Packer
  • Publication number: 20080006678
    Abstract: A friction stir tool is provided to perform friction stir riveting using a partially consumable pin, wherein the pin includes a cutting edge on a bottom surface thereof, wherein the tool is rotated at a first speed to enable cutting by the pin into a first material that is overlapping a second material, wherein after the pin has cut to a sufficient depth, the rotational speed of the tool is increased to thereby enable plasticization of the consumable pin, the first material, and the second material, wherein the tool is then rapidly decelerated until stopped, enabling diffusion bonding between the pin, the first material and the second material.
    Type: Application
    Filed: June 13, 2007
    Publication date: January 10, 2008
    Inventors: Scott Packer, Russell Steel, Jonathan Babb, Michael Miles, Kent Kohkonen
  • Patent number: 7225968
    Abstract: A system and method of using friction stir welding and friction stir processing to perform crack repair or preventative maintenance of various materials and structures, wherein the structures include pipeline, ships, and nuclear reactor containment vessels, wherein the friction stir welding and processing can be performed on various materials including metal matrix composites, ferrous alloys, non-ferrous alloys, and superalloys, and wherein the friction stir welding and processing can be performed remotely and in harsh environments such as underwater or in the presence of radiation.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: June 5, 2007
    Assignees: Sii Megadiamond, Inc., Advanced Metal Products, Inc.
    Inventors: Scott M. Packer, Russell J. Steel, Jonathan A. Babb, Chris Reed, Brian E. Taylor
  • Publication number: 20060081683
    Abstract: A mandrel that provides a counter-force to the pressure exerted on the outside of a pipe or other arcuate surface by a friction stir welding tool, wherein the mandrel is expandable through the use of a wedge, and wherein the mandrel enables multiple friction stir welding heads to simultaneously perform welding on the arcuate surface.
    Type: Application
    Filed: October 5, 2005
    Publication date: April 20, 2006
    Inventors: Scott Packer, Jonathan Babb, Russell Steel, Monte Russell
  • Publication number: 20050082342
    Abstract: A friction stir welding system that enables clamping of a pipe to enable friction stir welding around the pipe OD, a movable mandrel that provides a counter-force to the pressure exerted on the outside of a pipe by a tool, and a system for providing friction stir welding and repair inside a nuclear vessel in an underwater environment.
    Type: Application
    Filed: September 27, 2004
    Publication date: April 21, 2005
    Inventors: Jonathan Babb, Brian Taylor, Russell Steel, Chris Reed, Scott Packer
  • Publication number: 20050061853
    Abstract: A system and method of using friction stir welding and friction stir processing to perform crack repair or preventative maintenance of various materials and structures, wherein the structures include pipeline, ships, and nuclear reactor containment vessels, wherein the friction stir welding and processing can be performed on various materials including metal matrix composites, ferrous alloys, non-ferrous alloys, and superalloys, and wherein the friction stir welding and processing can be performed remotely and in harsh environments such as underwater or in the presence of radiation.
    Type: Application
    Filed: August 4, 2004
    Publication date: March 24, 2005
    Inventors: Scott Packer, Russell Steel, Jonathan Babb, Chris Reed, Brian Taylor
  • Publication number: 20050051602
    Abstract: A control system and method of use that enables friction stir welding of metal matrix composites, ferrous alloys, non-ferrous alloys, and superalloys when using a superabrasive tool, wherein the control system and method enables control of various operational aspects of a friction stir welding mill in order to make it possible to perform friction stir welding that is repeatable, reliable, and results in a superior finished workpiece.
    Type: Application
    Filed: May 13, 2004
    Publication date: March 10, 2005
    Inventors: Jonathan Babb, Troy Connolly, Russell Steel, Scott Packer, Tracy Nelson, Carl Sorensen
  • Patent number: 5847578
    Abstract: A programmable logic circuit includes a programmable logic array which generates a plurality of output signals for output from a single port on the programmable logic circuit, and which processes a plurality of input signals received from a single port on the programmable logic circuit. The programmable logic circuit also includes multiplexing means for receiving the plurality of output signals generated by the programmable logic array and for multiplexing the plurality of output signals. An output port outputs, from the programmable logic circuit, the multiplexed plurality of output signals generated by the programmable logic array. An input port receives a multiplexed plurality of input signals, and a demultiplexing means demultiplexes the multiplexed plurality of input signals and configurably communicates the demultiplexed plurality of input signals to the programmable logic array.
    Type: Grant
    Filed: January 8, 1997
    Date of Patent: December 8, 1998
    Assignee: Virtual Machine Works
    Inventors: Michael Donald Noakes, Charles W. Selvidge, Anant Argarwal, Jonathan Babb, Matthew L. Dahl
  • Patent number: 5761484
    Abstract: A compilation technique overcomes device pin limitations using virtual interconnections. Virtual interconnections overcome pin limitations by intelligently multiplexing each physical wire among multiple logical wires and pipelining these connections at the maximum clocking frequency. Virtual interconnections increase usable bandwidth and relax the absolute limits imposed on gate utilization in logic emulation systems employing Field Programmable Gate Arrays (FPGAs). A "softwire" compiler utilizes static routing and relies on minimal hardware support. The technique can be applied to any topology and FPGA device.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: June 2, 1998
    Assignee: Massachusetts Institute of Technology
    Inventors: Anant Agarwal, Jonathan Babb, Russell Tessier
  • Patent number: 5596742
    Abstract: A compilation technique overcomes device pin limitations using virtual interconnections. Virtual interconnections overcome pin limitations by intelligently multiplexing each physical wire among multiple logical wires and pipelining these connections at the maximum clocking frequency. Virtual interconnections increase usable bandwidth and relax the absolute limits imposed on gate utilization in logic emulation systems employing Field Programmable Gate Arrays (FPGAs). A "softwire" compiler utilizes static routing and relies on minimal hardware support. The technique can be applied to any topology and FPGA device.
    Type: Grant
    Filed: April 2, 1993
    Date of Patent: January 21, 1997
    Assignee: Massachusetts Institute of Technology
    Inventors: Anant Agarwal, Jonathan Babb, Russell Tessier