Abstract: A mechanism to raise and lower the sail of a boat includes a headcar movably secured to a mast of the boat and a headboard affixed to the sail. A pulling force applied to a halyard raises the sail and causes the headboard to engage the headcar. When the sail is lowered, the headboard disengages from the headcar so that the sail furls flat on the boom.

Abstract: A mechanism to raise and lower the sail of a boat includes a headcar movably secured to a mast of the boat and a headboard affixed to the sail. A pulling force applied to a halyard raises the sail and causes the headboard to engage the headcar. When the sail is lowered, the headboard disengages from the headcar so that the sail furls flat on the boom.

Abstract: The present invention is directed to plants that display a drought tolerance phenotype due to altered expression of a DR02 nucleic acid. The invention is further directed to methods of generating plants with a drought tolerance phenotype.

Abstract: The present invention is directed to plants that display a pathogen resistance phenotype due to altered expression of a PPR2 nucleic acid. The invention is further directed to methods of generating plants with a pathogen resistance phenotype.

Abstract: A sampling system includes an input terminal for receiving a data signal having a signal component and possibly a noise component. A sampler samples the data signal at a sample rate set in responsive to a control signal. A noise detector detects the presence of a noise component, and if a noise component is detected, generates the control signal conditioning the sampler to sample the data signal at a first sample rate satisfying the Nyquist criterion for the data signal including the noise component, and otherwise generating the control signal conditioning the sampler to sample the data signal at a second data rate satisfying the Nyquist criterion for the data signal including only the signal component.

Abstract: A sampling system includes an input terminal for receiving a data signal having a signal component and possibly a noise component. A sampler samples the data signal at a sample rate set in responsive to a control signal. A noise detector detects the presence of a noise component, and if a noise component is detected, generates the control signal conditioning the sampler to sample the data signal at a first sample rate satisfying the Nyquist criterion for the data signal including the noise component, and otherwise generating the control signal conditioning the sampler to sample the data signal at a second data rate satisfying the Nyquist criterion for the data signal including only the signal component.

Abstract: Internet-based enhanced radio. The radio appliance, through a network interface and Internet service provider, accesses a tuning service built upon a plurality of databases. The tuning service, databases, and related enhanced services provide the listener a variety of services, complimenting AM/FM radio broadcasts and Internet radio media stream broadcasts. The radio appliance user can request additional information concerning advertised products, identify and purchase soundtracks and CDs, purchase advertised products, and respond to market research polling and surveys. The tuning service and related enhanced services can monitor, collect, process, and store user music preferences, polling and survey results, user behavior statistics, and purchase and information requests. Market research and subscriber information is stored, retrieved, and updated in databases accessible to the tuning service.

Abstract: An address selective address mapping system comprises an address translation circuit, a central processing unit (CPU), a data cache, and a memory. The address outputs of the CPU are coupled to a first address bus, while the address inputs of the data cache and memory are coupled to a second address bus. The address translation circuit's inputs are coupled to the first address bus, and the address translation circuit's outputs are coupled to the second address bus. The CPU sends a pointer address via the first address bus to the address translation circuit. The address translation circuit determines whether the pointer address indicates that the next source instruction is within the subset of the most frequently executed source instructions. If so, the address translation circuit maps the pointer address to an address within the data cache. If not, the pointer address is routed through the address translation circuit unchanged.

Abstract: An apparatus and method for emulation routine pointer prefetch are disclosed. The apparatus includes an emulated program counter (EPC), a prefetch state machine, a summing device, an opcode storage device, and a pointer storage device. The EPC, opcode storage device and pointer storage device are coupled to a bus to receive, store and output an emulated program counter value, an opcode value and a pointer to a next emulation routine. The EPC, opcode storage device, and pointer storage device are controlled by the prefetch state machine, which also is coupled to the bus to detect a reference to a reserved memory address and stores an updated emulated program counter value in the EPC using the summing device. The prefetch state machine uses the EPC value to prefetch the next source instruction to be emulated in a first memory operation. A portion of the prefetched source instruction is the opcode value and is stored in the opcode storage device.