Abstract: Some embodiments of the invention provide a method of searching for a three-dimensional global path between first and second sets of routable elements in a region of a layout that has multiple layers. The method partitions the region into several sub-regions. It then performs a path search to identify a path between a first set of sub-regions that contains the first-set elements and a second set of sub-regions that contain a second-set element. When the method performing the path search, it explores expansions along Manhattan and non-Manhattan routing directions between the sub-regions on a plurality of layers.

Abstract: Some embodiments of the invention provide a method of searching for a global path between first and second sets of routable elements in a region of a layout. The method partitions the region into several rectangular sub-regions. It then identifies a set of sub-regions that contain the two sets of elements. Next, it performs a path search to identify a set of path expansions between a sub-region that contains a first-set element and a sub-region that contains a second-set element. When the method performs the path search, it explores expansions along non-Manhattan directions between the sub-regions.

Abstract: Some embodiments of the invention provide a method of costing routes for a set of nets. The method identifies at least one route for each net, where each route has a particular length. It also identifies an estimated route length for each net. It then computes a cost that includes an exponential expression for each net. Each net's exponential expression includes a base and an exponent. The exponent of each net's exponential expression includes the length of the net's route divided by the estimated route length for the net.

Abstract: Some embodiments of the invention provide a method of routing. The method selects a net with a set of routable elements in a multi-layer layout region. In some embodiments, the method identifies a route for the net based on different congestion goals on different layers. In other embodiments, the method identifies a route for the net based on different congestion goals between different layer pairs. In some embodiments, the method identifies a route for the net based on both the different congestion goals on different layers and between different layer pairs.

Abstract: Some embodiments of the invention provide a method of defining a global route for a net in a region of a layout, where each net has a set of routable elements. The method partitions the region into several rectangular sub-regions. It then identifies a set of sub-regions that contain the routable elements of the net. Next, it defines a global route that connects the identified sub-regions, where the global route includes at least one non-Manhattan edge that crosses a boundary between two sub-regions at a non-vertex location.

Abstract: An automated method of designing large digital integrated circuits using a software program to partition the design into physically realizable blocks and then create the connections between blocks so as to maximize operating speed and routability while minimizing the area of the resulting integrated circuit. Timing and physical constraints are generated for each physically realizable block so that standard-cell place and route software can create each block independently as if it were a separate integrated circuit.

Abstract: Some embodiments of the invention provide a method for defining routes for nets in a region of a circuit layout. This method uses a first set of lines to measure length of routes, and uses a second set of lines to measure congestion of routes.

Abstract: An automated method of designing large digital integrated circuits using a software program to partition the design into physically realizable blocks then create the connections between blocks so as to maximize operating speed and routability while minimizing the area of the resulting integrated circuit. Timing and physical constraints are generated for each physically realizable block so that standard-cell place and route software can create each block independently as if it were a separate integrated circuit.

Abstract: An automated method of designing large digital integrated circuits using a software program to partition the design into physically realizable blocks and then create the connections between blocks so as to maximize operating speed and routability while minimizing the area of the resulting integrated circuit. Timing and physical constraints are generated for each physically realizable block so that standard-cell place and route software can create each block independently as if it were a separate integrated circuit.

Abstract: This invention provides mechanisms that detect the large dynamic range of radiant intensities in the natural environment, that use novel strategies to calculate an approximation of visual properties of objects, and that represent a scene with an image having a specific dynamic range that is optimal for display media such as photography, television and printing.Photographs and other images are made according to the foregoing mechanisms from lightness fields produced from multiple comparisons between information associated with a different segmental areas of an image field. Different comparisons involve different groups of segmental areas, and different groupings have at least one spatial parameter different from other groupings of areas. Comparisons advantageously are made in succession with an ordered sequence of the spatial parameter and employing results of prior comparisons.