Abstract: Methods, systems and apparatuses for voltage regulation are disclosed. For an embodiment, a voltage regulator includes a power source block configured to convert an input voltage to an output voltage to supply current to an output load, a storage capacitor, and an active filter configured to transfer energy between the output load and the storage capacitor. A conversion ratio of the active filter is controlled by a parameter related to the output voltage, and a conversion ratio of the power source block is at least partially controlled by a parameter related to the voltage on the storage capacitor.

Abstract: Methods, systems and apparatuses for voltage regulation are disclosed. For an embodiment, a voltage regulator includes a power source block configured to convert an input voltage to an output voltage to supply current to an output load, a storage capacitor, and an active filter configured to transfer energy between the output load and the storage capacitor. A conversion ratio of the active filter is controlled by a parameter related to the output voltage, and a conversion ratio of the power source block is at least partially controlled by a parameter related to the voltage on the storage capacitor.

Abstract: Methods, systems and apparatuses for voltage regulation are disclosed. For an embodiment, a voltage regulator includes a power source block configured to convert an input voltage to an output voltage to supply current to an output load, a storage capacitor, and an active filter configured to transfer energy between the output load and the storage capacitor. A conversion ratio of the active filter is controlled by a parameter related to the output voltage, and a conversion ratio of the power source block is at least partially controlled by a parameter related to the voltage on the storage capacitor.

Abstract: Methods, systems and apparatuses for voltage regulation are disclosed. For an embodiment, a voltage regulator includes a power source block configured to convert an input voltage to an output voltage to supply current to an output load, a storage capacitor, and an active filter configured to transfer energy between the output load and the storage capacitor. A conversion ratio of the active filter is controlled by a parameter related to the output voltage, and a conversion ratio of the power source block is at least partially controlled by a parameter related to the voltage on the storage capacitor.

Abstract: A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal.

Abstract: A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal.

Abstract: A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal.

Abstract: A dynamically read fuse cell includes a first circuit which includes a known reference resistance Rref, and a second circuit which includes a programmed fuse having a resistance Rfuse; the state of the programmed fuse is to be read. The first and second circuits receive a common “read” signal, and are arranged to produce first and second outputs which begin changing state in response; the first and second outputs have respective slew rates which vary with Rref and Rfuse, respectively. The first and second circuits are interconnected such that causing both outputs to begin changing state in response to the “read” signal triggers a time domain race condition, the result of which indicates which of the outputs slewed more quickly in response to the “read” signal, thereby indicating the relationship between Rref and Rfuse and, when Rref is properly chosen, the state of the fuse.

Abstract: A dynamically read fuse cell comprises a first circuit which includes a known reference resistance Rref, and a second circuit which includes a programmed fuse having a resistance Rfuse; the state of the programmed fuse is to be read. The first and second circuits receive a common “read” signal, and are arranged to produce first and second outputs which begin changing state in response; the first and second outputs have respective slew rates which vary with Rref and Rfuse, respectively. The first and second circuits are interconnected such that causing both outputs to begin changing state in response to the “read” signal triggers a time domain race condition, the result of which indicates which of the outputs slewed more quickly in response to the “read” signal, thereby indicating the relationship between Rref and Rfuse and, when Rref is properly chosen, the state of the fuse.

Abstract: A programmable fuse state determination system and method provide a fuse current through a programmed fuse which produces a voltage that varies with the fuse's resistance. The voltage is compared with a threshold voltage to indicate whether the fuse is blown or intact. The invention employs ‘normal’ and ‘test’ modes, in which the relationship between the fuse's resistance and the threshold voltage differ, such that a higher fuse resistance is required for the fuse to be determined blown in the ‘test’ mode than in the ‘normal’ mode.

Abstract: An anti-cross conduction driver control circuit and method prevent the occurrence of race conditions and avoid cross-conduction between series-connected power devices, typically MOSFETs, controlled in accordance with the present invention. Individual state machines are connected across the inputs and outputs of each power device driver, and are arranged to accurately determine when the driver has completed a task requested of it. Each state machine produces a “lockout” signal based on driver status, which is used to inhibit the operation of the opposite driver under prescribed conditions, and to thereby prevent cross-conduction between the series-connected power devices.

Abstract: A communication system includes a master device which communicates with a chain of serially-connected slave devices. The master originates messages, each of which is intended for a particular ‘target’ slave device. Each message contains a ‘distance to target device’ value equal to the number of devices between the master and target, and a data packet containing data to be conveyed between the master and target. Each slave device determines if the ‘distance to target device’ value indicates that it is the target. If not, the slave device increments or decrements the value in real time, with no latency, and transmits the modified message to the next slave device until received by the target device. In one embodiment, the target device may place data in the data packet, and the slave devices are arranged to buffer the data back to the master device.

Abstract: A programmable “semi-fusible” link system is used to trim one or more circuit parameters. Each semi-fusible link, typically a thin film resistor, has “intact” and “blown” states, with the link having a first, non-zero resistance when intact, and a second, higher but finite resistance when blown, which is accomplished by forcing a predetermined current through the link. Each link is connected to a respective active devices which, when turned on, provide the current needed to blow the link. The links are also connected in series with respective current sources, and to respective threshold detectors connected to monitor the current through their respective links. Each threshold detector provides a logic output which indicates whether its link is intact or blown based on the magnitude of the link current. A “disable” circuit may also be included which, when activated, prevents the further programming of any of the circuit's semi-fusible links.

Abstract: A comparison system compares a voltage which is proportional to absolute temperature S.sub.p to one which is equal to the sum of a conventional, uncorrected, bandgap cell voltage VBG and a proportional to absolute temperature voltage CT. The addition of CT to the uncorrected bandgap signal value yields a signal of the form Sp/(VBG+CT), which exhibits improved linearity over a signal of the form Sp/VBG, where VBG includes a Tln(T) term.