Abstract: Field-based detection of 3:2 pulldown in a sequence of digital video fields using a programmable graphics processor is described. The detection is performed using a threshold value to determine equivalence between a pair of fields of digital video data. Furthermore, additional threshold values may be used to control switching into a mode where duplicated fields of digital video data are identified and not displayed and out of the mode where duplicated fields of digital video data are identified and not displayed. Look ahead can be used to detect when to switch into or out of the mode where duplicated fields of digital video data are identified and not displayed, reducing the occurrence of visual artifacts.

Abstract: A method for adapting power consumption of a processor based upon an application demand is provided. The method initiates with determining an application demand based upon a current processing operation. Then, a time interval associated with the application demand is determined. Next, unnecessary power consuming functions for the application demand are determined. Then, a clock frequency for the unnecessary power consuming functions is reduced for the time interval. In one embodiment, the power is terminated to the unnecessary power consuming functions. In another embodiment, the clock frequency of the processor is adjusted for at least a portion of the time interval. A program interface for adapting power consumption of a computer system, processor instructions for adapting power consumption of a computer system and a processor are included.

Abstract: There is disclosed an apparatus for providing a virtual PCI device for use in a processing system comprising a data processor having an external peripheral bus coupled thereto in which peripheral devices associated with the external peripheral bus are controlled by accessing configuration circuitry associated with each of the peripheral devices. The apparatus comprises: a) an address trap circuit for detecting a configuration cycle accessing a virtual configuration address space associated with the virtual PCI device and generating an enable signal in response and b) an interrupt generation circuit associated with the address trap circuit that receives the enable signal and, in response, generates an interrupt signal that causes the data processor to execute instructions stored in system memory associated with the virtual device.

Abstract: A type of switching fabric for exchanging variable-size frames of digital information between frame processors coupled directly or indirectly to one or more digital communication lines. It comprises one or more multi-line serial communication controllers (MSCCs), and a backplane providing a full mesh of serial point-to-point bi-directional links between each MSCC, and, in a loopback, from each MSCC back to itself. The MSCCs collectively manage the transfer of variable-size frames between the frame processors. To transfer digital information from a source line to a destination line, a frame processor coupled to the ingress line drives the switching fabric by signaling its MSCC that there is information. The ingress MSCC then switches the digital information through the backplane to the MSCC serving the frame processor coupled to the egress line. The switching fabric uses a clocking scheme that makes possible high throughput rates.