Abstract: A technique is provided for processing thread groups, each thread group having associated program code comprising a plurality of regions that each require access to an associated plurality of registers providing operand values for the instructions of that region. Capacity management circuitry is arranged, for a thread group having a region of the associated program code that is ready to be executed, to perform an operand setup process to reserve sufficient storage elements within an operand staging unit to provide the associated plurality of registers, and to cause the operand value for any input register to be preloaded into a reserved storage element allocated for that input register, an input register being a register whose operand value is required before the region can be executed. Scheduling circuitry selects for processing a thread group for which the operand setup process has been performed in respect of the region to be executed.

Abstract: An apparatus and method are provided for processing thread groups, where each thread group has associated program code and comprises one or more threads. Scheduling circuitry is used to select thread groups from a plurality of thread groups, and then thread processing circuitry is responsive to the scheduling circuitry to process one or more threads of a selected thread group by executing instructions of the associated program code. The associated program code comprises a plurality of regions that each require access to an associated plurality of registers providing operand values for the instructions of that region. An operand staging unit is provided that has a plurality of storage elements that are dynamically allocated to provide the associated plurality of registers for one or more of the regions.