Abstract: A pixel architecture having an in-pixel amplifier comprising an NMOS transistor and a depletion-mode NMOS load is disclosed. In one aspect, the pixel architecture comprises a pixel core including a pixel photodiode for generating an output signal in accordance with incident light. Further, the in-pixel amplifier is connected to a pixel core to amplify the output signal before it is stored in a column buffer before being read out at output of the pixel architecture. By having an in-pixel amplifier that can be used for amplification of the output signal inside the pixel architecture, a larger output value is obtained which may be stored inside the pixel architecture on a small capacitor with improved signal-to-noise performance. This in-pixel amplification can also improve the quality of stored signals for global shutter operation.

Abstract: Described herein is a pixel readout circuit which provides readout at two sensitivity levels depending on the amount of electrons generated by a pixel photodiode in the circuit. A floating diffusion capacitor operates to store charge up to a saturation value determined by its capacitance and an overflow capacitor is provided in an overflow region for storing charge above the saturation value of the floating diffusion capacitor. Readout at a high sensitivity level is provided when the floating diffusion capacitor is not saturated and readout at a lower sensitivity level is provided when there is saturation and subsequent overflow to the overflow region. Connection of the floating diffusion capacitor to the overflow capacitor shares the charge over the combined capacitance of the two capacitors and provides readout at a lower sensitivity without loss of charge.

Abstract: The present description relates to a readout circuit for digitizing an analog input signal of an imaging device into a digital output. The readout circuit comprises a pixel signal input for providing an analog signal from at least one imaging pixel element, a variable gain amplifier for providing an amplified signal of the analog signal by a gain factor, and a first analog to digital conversion means for quantizing the analog signal into a first digital signal. The circuit further comprises a control means for setting the gain factor of the variable gain amplifier by taking into account the first digital signal, and a second analog to digital conversion means for quantizing the amplified signal into a second digital signal. The circuit also comprises a digital output for outputting a signal determined as function of at least the second digital signal.

Abstract: The present disclosure relates to a method for reducing second order intermodulation distortion in a harmonic rejection mixer arranged for down-converting a radio frequency signal to an in-phase and a quadrature baseband signal. The method includes adjusting an output current of a first mixer, to reduce the second order intermodulation distortion in the quadrature baseband signal to a first value, and adjusting an output current of a second mixer, to reduce the second order intermodulation distortion in the in-phase baseband signal to a second value.

Abstract: A tunable impedance network and a method for tuning the tunable impedance network are disclosed. In one aspect, the tunable impedance network comprises a plurality of transformers connected in series. Each transformer has a primary winding and a secondary winding. The transformers have a voltage transformation ratio of N:1 with N>1. An impedance structure, acting as a resonant circuit together with the inductance of the secondary winding, is connected at the secondary winding of each transformer. A control circuit or processor is configured to tune the imaginary part of at least one of the impedance structures so as to change its resonance frequency to mimic a reference impedance. The control circuit is further configured to tune the real part of at least one of the impedance structures so as to change its Q-factor to mimic the reference impedance.

Abstract: Disclosed an electronic device comprising an ovenized system containing a micro-electromechanical (MEM) resonator and a method for controlling such an MEM resonator. In one embodiment, the MEM resonator comprises a resonator body suspended above a substrate by means of at least a first and a second mechanical support forming a first and a second heating resistance, respectively, configured to heat the resonator body through Joules heating, biasing means configured to apply a bias voltage to the resonator body to enable vibration at a predetermined operating frequency, a temperature control system configured to control the temperature of the micro-electromechanical resonator, and an internal voltage monitoring system configured to monitor a voltage level of the resonator body.

Abstract: A system is disclosed that includes an oven and a micromechanical oscillator inside the oven configured to oscillate at a predetermined frequency at a predetermined temperature, where the predetermined frequency is based on a temperature dependency and at least one predetermined property. The system further includes an excitation mechanism configured to excite the micromechanical oscillator to oscillate at the predetermined frequency and a temperature control loop configured to detect a temperature of the micromechanical oscillator using resistive sensing, determine whether the temperature of the micromechanical oscillator is within a predetermined range of the predetermined temperature based on the temperature dependency and the at least one predetermined property in order to minimize frequency drift, and adapt the temperature of the micromechanical oscillator to remain within the predetermined range.

Abstract: Method and system (1) for stabilizing a temperature (Tcomp) of an integrated electrical component, placed in an oven, at a predefined temperature (Tset). The temperature of the integrated electrical component is sensed by means of temperature sensing means, comprising a first resp. second sensing element (61, 62) located in good thermal contact with the integrated electrical component, the first resp. second sensing elements (61, 62) having a first resp. second temperature dependent characteristic (63, 64), the second temperature dependency being different from the first temperature dependency such that the first and second characteristics (63, 64) intersect at the predefined temperature (Tset), and a sensing circuit (72) adapted for sensing the first and the second sensing elements (61, 62) and for supplying a first resp. second measurement signal (83, 84) indicative of the first resp.

Abstract: A low noise amplifying (LNA) circuit comprising an amplifying section (11, 12) and a feedback means (14) arranged for providing input matching from the output to the input. The LNA circuit further comprises at least one frequency band determining inductor (15) having a predetermined resonance frequency for influencing at least one frequency band in which the amplifying section operates. The at least one inductor is directly connected to the output of the circuit and the feedback means (14) provides a feedback connection for the section (s) to the input. In this way, the at least one frequency band in which the amplifying section operates is substantially completely determined by the at least one frequency band determining inductor (15).

Abstract: An analog to digital converting device is proposed for generating a digital output signal of an RF analog input signal. The device comprises a first analog to digital converter stage, a mixer, a second analog to digital converter stage and a digital filter. The first analog to digital converter stage generates a first and a second output signal. The first output signal is inputted in the filtering means. The second output signal is being down-converted to a signal with an intermediate frequency or DC. Thereafter, this down-converted signal is being fed to the second analog to digital converter stage. The digital output signal of this second stage is further processed together with the first digital output signal in the digital filter to a digital signal representative of the analog input signal.

Abstract: An adaptive front-end architecture for a receiver is disclosed. In one embodiment, the adaptive front-end architecture includes an input configured to receive an input signal and a linear low-noise amplifier connected to the input and configured to amplify the input signal to produce an amplified input signal. The adaptive front-end architecture further includes a first passive mixer arrangement configured to generate first a local oscillator signal and mix the first local oscillator signal with the amplified input signal to produce a first baseband output signal. The adaptive front-end architecture further includes a second passive mixer arrangement configured to generate a second local oscillator signal and mix the second local oscillator signal with the input signal to produce a second baseband output signal. The adaptive front-end architecture further includes a baseband impedance component configured to filter the first baseband signal and/or the second baseband signal using impedance translation.

Abstract: A time interval measuring system is disclosed. In one embodiment, the time interval measuring system includes a plurality of time interval analyzers, each having a resolution that differs from a resolution of at least one other time interval analyzer in the plurality of time interval analyzers. The plurality of time interval analyzers are configured to receive a first event signal representing a first event, receive a second event signal representing a second event, and generate digital first estimates representing a time difference between the first event and the second event. The time interval measuring system further includes a post-processing unit configured to receive the digital first estimates and combine the digital first estimates according to at least one algorithm to generate a digital second estimate representing the time difference between the first event and the second event having higher precision than each of the digital first estimates.

Abstract: A low noise amplifying (LNA) circuit comprising an amplifying section (11, 12) and a feedback means (14) arranged for providing input matching from the output to the input. The LNA circuit further comprises at least one frequency band determining inductor (15) having a predetermined resonance frequency for influencing at least one frequency band in which the amplifying section operates. The at least one inductor is directly connected to the output of the circuit and the feedback means (14) provides a feedback connection for the section (s) to the input. In this way, the at least one frequency band in which the amplifying section operates is substantially completely determined by the at least one frequency band determining inductor (15).

Abstract: An analog to digital converting device is proposed for generating a digital output signal of an RF analog input signal. The device comprises a first analog to digital converter stage, a mixer, a second analog to digital converter stage and a digital filter. The first analog to digital converter stage generates a first and a second output signal. The first output signal is inputted in the filtering means. The second output signal is being down-converted to a signal with an intermediate frequency or DC. Thereafter, this down-converted signal is being fed to the second analog to digital converter stage. The digital output signal of this second stage is further processed together with the first digital output signal in the digital filter to a digital signal representative of the analog input signal.