Patents by Inventor Jonathan C. Dahm

Jonathan C. Dahm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110195202
    Abstract: A method of managing particles and material accumulation in exhaust components used in deposition systems is provided. More specifically, embodiments of the present invention relate to methods of preventing build-up of explosive material in vacuum forelines of deposition systems. In one embodiment, a short purge of oxygen-containing gas may be introduced into the foreline during or in between cycles of deposition of a layer on the substrate in order to oxidize at least a portion of combustible processing by-products in the foreline. In one embodiment, at least a portion of the processing by-products and oxygen-containing gas react to form silicon dioxide (SiO2).
    Type: Application
    Filed: February 11, 2010
    Publication date: August 11, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventor: Jonathan C. Dahm
  • Patent number: 5431778
    Abstract: A layer of material (14) comprising silicon, such as an SiO.sub.2 layer, overlying a silicon substrate (12) of a semiconductor device (10), is dry etched without the need for traditional halocarbon gases (such as CHF.sub.3, CF.sub.4, and C.sub.2 F.sub.6) which are known green-house gases. A fluorine source, for producing the active fluorine radicals needed to etch silicon, is selected from either HF or F.sub.2 gases. A carbon-oxygen source, for providing and stabilizing polymer build-up in the reactor, is selected from either CO or CO.sub.2. An additional hydrogen source may be added as needed.
    Type: Grant
    Filed: February 3, 1994
    Date of Patent: July 11, 1995
    Assignee: Motorola, Inc.
    Inventors: Jonathan C. Dahm, Gregory E. Bartlett, Gregory Ferguson
  • Patent number: 5377072
    Abstract: A single metal-plate bypass capacitor (10) includes a metal top plate (26) separated from a silicon substrate (12) by a thermally-grown, silicon dioxide dielectric (16) layer. An additional silicon plate (36) can be included intermediate to the metal top plate (26) and the silicon substrate (12) for multiple power supply devices. The silicon substrate (12) is electrically accessed through a metal contact pad (28) overlying a doped region (34) of the silicon substrate (12). The metal contact pad (28) is electrically isolated from the top plate (26) by an isolation structure (30). The bypass capacitor (10) is designed to be attached directly to the top surface of a semiconductor device (18), which enables the bypass capacitor (10) to be interconnected to the semiconductor device (18) by a plurality of bonding wires (25) having a minimal length. Because the capacitor dielectric (16) is formed as a very thin layer by the thermal oxidation of silicon, the self-inductance of bypass capacitor (10) is minimized.
    Type: Grant
    Filed: January 10, 1994
    Date of Patent: December 27, 1994
    Assignee: Motorola Inc.
    Inventors: Aubrey K. Sparkman, Kevin A. Calhoun, Jonathan C. Dahm, Joseph M. Haas, Jr., Rolando J. Osorio
  • Patent number: 5300187
    Abstract: Contaminants are removed from a semiconductor material by heating the semiconductor material to temperature within the range of a minimum temperature where a halogen compound will decompose to halogen atoms without the use of ultraviolet irradiation and react with contaminants present on the semiconductor material and a maximum temperature of 800.degree. C., wherein less than or equal to approximately 50 Angstroms of oxide is formed on the semiconductor material. The ambient in which the semiconductor material is heated is an ambient comprised of a nonreactive gas and a halogen compound for at least a time sufficient to remove a substantial amount of contaminants from the semiconductor material.
    Type: Grant
    Filed: September 3, 1992
    Date of Patent: April 5, 1994
    Assignee: Motorola, Inc.
    Inventors: Israel A. Lesk, Young Limb, Philip J. Tobin, John Franka, Paul T. Lin, Jonathan C. Dahm, Gary L. Huffman, Bich-Yen Nguyen
  • Patent number: 5250165
    Abstract: A multi-tiered contact etch process comprising alternating anisotropic and isotropic etch steps is performed in a reactive ion etcher wherein DC bias on a cathode (11) of the etcher can be controlled independently from RF power, adding a great deal of control over isotropy of the etching. By shunting the cathode (11) directly to ground a high level of isotropy is achieved during isotropic etch steps. When the cathode (11) is not shunted to ground a bias voltage develops on the cathode (11) providing a highly anisotropic etching.
    Type: Grant
    Filed: December 9, 1991
    Date of Patent: October 5, 1993
    Assignee: Motorola, Inc.
    Inventors: Robert Berglund, Karl Mautz, Jonathan C. Dahm
  • Patent number: 4428975
    Abstract: In a process for depositing nitride on semiconductor wafers in a tube, streaks can develop on the wafers. The streaks are eliminated by using a quartz tube which has an inside surface coated with polysilicon for the nitride deposition.
    Type: Grant
    Filed: January 28, 1983
    Date of Patent: January 31, 1984
    Assignee: Motorola, Inc.
    Inventors: Jonathan C. Dahm, John G. Franka
  • Patent number: 4402997
    Abstract: In a process for depositing nitride on semiconductor wafers in a tube, streaks can develop on the wafers. The streaks are eliminted by flowing oxygen through the tube between nitride depositions of different groups of wafers.
    Type: Grant
    Filed: May 17, 1982
    Date of Patent: September 6, 1983
    Assignee: Motorola, Inc.
    Inventors: Richard H. Hogan, Jonathan C. Dahm