Abstract: A method of testing a semiconductor wafer having a test structure performs an E-beam stress scan of the test structure in an E-beam system to electrically stress the test structure to produce a stress defect. An inspection scan is performed in the E-beam system to identify the stress defect.

Abstract: Polysilicon or other material is directionally trimmed using two layers of photoresist and a photoresist etching process, such as ashing. A first layer of photoresist is patterned on a wafer. Portions of the first patterned photoresist are covered with a second layer of photoresist. The photoresist is trimmed to reduce the size of the exposed portions of the first patterned photoresist without reducing the size of the covered portions of the first patterned photoresist. The second layer of photoresist is removed. The selectively etched patterned first layer of photoresist is used as a process mask to define a structure in the underlying material. In a particular embodiment, the second photoresist covers endcap portions of gate photoresist. Directional trimming reduces the width of a polysilicon gate structure (i.e. gate length) over an active area of an FET, without reducing the length of original first patterned photoresist.

Abstract: Described are methods of adapting FIB techniques to copper metallization, and to structures that result from the application of such techniques. A method in accordance with the invention can be used to sever copper traces without damaging adjacent material or creating conductive bridges to adjacent traces. Semiconductor devices that employ copper traces typically include a protective passivation layer that protects the copper. This passivation layer is removed to render the copper traces visible to an FIB operator. The copper surface is then oxidized, as by heating the device in air, to form a copper-oxide layer on the exposed copper. With the copper-oxide layer in place, an FIB is used to mill through the copper-oxide and copper layers of a selected copper trace to sever the trace. The copper-oxide layer protects copper surfaces away from the mill site from reactive chemicals used during the milling process. In one embodiment, a copper-oxide layer of at least 40 nanometers thick affords adequate protection.